/***************************************************************************
* Copyright (C) 2008 by Spencer Oliver *
* spen@spen-soft.co.uk *
* *
* Copyright (C) 2008 by David T.L. Wong *
* *
* Copyright (C) 2007,2008 Øyvind Harboe *
* oyvind.harboe@zylin.com *
* *
* Copyright (C) 2011 by Drasko DRASKOVIC *
* drasko.draskovic@gmail.com *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program; if not, write to the *
* Free Software Foundation, Inc., *
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include "mips32.h"
#include "breakpoints.h"
#include "algorithm.h"
#include "register.h"
static char *mips32_core_reg_list[] = {
"zero", "at", "v0", "v1", "a0", "a1", "a2", "a3",
"t0", "t1", "t2", "t3", "t4", "t5", "t6", "t7",
"s0", "s1", "s2", "s3", "s4", "s5", "s6", "s7",
"t8", "t9", "k0", "k1", "gp", "sp", "fp", "ra",
"status", "lo", "hi", "badvaddr", "cause", "pc"
};
static const char *mips_isa_strings[] = {
"MIPS32", "MIPS16e"
};
static struct mips32_core_reg mips32_core_reg_list_arch_info[MIPS32NUMCOREREGS] = {
{0, NULL, NULL},
{1, NULL, NULL},
{2, NULL, NULL},
{3, NULL, NULL},
{4, NULL, NULL},
{5, NULL, NULL},
{6, NULL, NULL},
{7, NULL, NULL},
{8, NULL, NULL},
{9, NULL, NULL},
{10, NULL, NULL},
{11, NULL, NULL},
{12, NULL, NULL},
{13, NULL, NULL},
{14, NULL, NULL},
{15, NULL, NULL},
{16, NULL, NULL},
{17, NULL, NULL},
{18, NULL, NULL},
{19, NULL, NULL},
{20, NULL, NULL},
{21, NULL, NULL},
{22, NULL, NULL},
{23, NULL, NULL},
{24, NULL, NULL},
{25, NULL, NULL},
{26, NULL, NULL},
{27, NULL, NULL},
{28, NULL, NULL},
{29, NULL, NULL},
{30, NULL, NULL},
{31, NULL, NULL},
{32, NULL, NULL},
{33, NULL, NULL},
{34, NULL, NULL},
{35, NULL, NULL},
{36, NULL, NULL},
{37, NULL, NULL},
};
/* number of mips dummy fp regs fp0 - fp31 + fsr and fir
* we also add 18 unknown registers to handle gdb requests */
#define MIPS32NUMFPREGS (34 + 18)
static uint8_t mips32_gdb_dummy_fp_value[] = {0, 0, 0, 0};
static struct reg mips32_gdb_dummy_fp_reg = {
.name = "GDB dummy floating-point register",
.value = mips32_gdb_dummy_fp_value,
.dirty = 0,
.valid = 1,
.size = 32,
.arch_info = NULL,
};
static int mips32_get_core_reg(struct reg *reg)
{
int retval;
struct mips32_core_reg *mips32_reg = reg->arch_info;
struct target *target = mips32_reg->target;
struct mips32_common *mips32_target = target_to_mips32(target);
if (target->state != TARGET_HALTED)
return ERROR_TARGET_NOT_HALTED;
retval = mips32_target->read_core_reg(target, mips32_reg->num);
return retval;
}
static int mips32_set_core_reg(struct reg *reg, uint8_t *buf)
{
struct mips32_core_reg *mips32_reg = reg->arch_info;
struct target *target = mips32_reg->target;
uint32_t value = buf_get_u32(buf, 0, 32);
if (target->state != TARGET_HALTED)
return ERROR_TARGET_NOT_HALTED;
buf_set_u32(reg->value, 0, 32, value);
reg->dirty = 1;
reg->valid = 1;
return ERROR_OK;
}
static int mips32_read_core_reg(struct target *target, int num)
{
uint32_t reg_value;
/* get pointers to arch-specific information */
struct mips32_common *mips32 = target_to_mips32(target);
if ((num < 0) || (num >= MIPS32NUMCOREREGS))
return ERROR_COMMAND_SYNTAX_ERROR;
reg_value = mips32->core_regs[