/***************************************************************************
* Copyright (C) 2013 Synapse Product Development *
* Andrey Smirnov <andrew.smironv@gmail.com> *
* Angus Gratton <gus@projectgus.com> *
* Erdem U. Altunyurt <spamjunkeater@gmail.com> *
* *
* This program is free software; you can redistribute it and/or modify *
* it under the terms of the GNU General Public License as published by *
* the Free Software Foundation; either version 2 of the License, or *
* (at your option) any later version. *
* *
* This program is distributed in the hope that it will be useful, *
* but WITHOUT ANY WARRANTY; without even the implied warranty of *
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
* along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include "imp.h"
#include <target/algorithm.h>
#include <target/armv7m.h>
#include <helper/types.h>
enum {
NRF51_FLASH_BASE = 0x00000000,
};
enum nrf51_ficr_registers {
NRF51_FICR_BASE = 0x10000000, /* Factory Information Configuration Registers */
#define NRF51_FICR_REG(offset) (NRF51_FICR_BASE + offset)
NRF51_FICR_CODEPAGESIZE = NRF51_FICR_REG(0x010),
NRF51_FICR_CODESIZE = NRF51_FICR_REG(0x014),
NRF51_FICR_CLENR0 = NRF51_FICR_REG(0x028),
NRF51_FICR_PPFC = NRF51_FICR_REG(0x02C),
NRF51_FICR_NUMRAMBLOCK = NRF51_FICR_REG(0x034),
NRF51_FICR_SIZERAMBLOCK0 = NRF51_FICR_REG(0x038),
NRF51_FICR_SIZERAMBLOCK1 = NRF51_FICR_REG(0x03C),
NRF51_FICR_SIZERAMBLOCK2 = NRF51_FICR_REG(0x040),
NRF51_FICR_SIZERAMBLOCK3 = NRF51_FICR_REG(0x044),
NRF51_FICR_CONFIGID = NRF51_FICR_REG(0x05C),
NRF51_FICR_DEVICEID0 = NRF51_FICR_REG(0x060),
NRF51_FICR_DEVICEID1 = NRF51_FICR_REG(0x064),
NRF51_FICR_ER0 = NRF51_FICR_REG(0x080),
NRF51_FICR_ER1 = NRF51_FICR_REG(0x084),
NRF51_FICR_ER2 = NRF51_FICR_REG(0x088),
NRF51_FICR_ER3 = NRF51_FICR_REG(0x08C),
NRF51_FICR_IR0 = NRF51_FICR_REG(0x090),
NRF51_FICR_IR1 = NRF51_FICR_REG(0x094),
NRF51_FICR_IR2 = NRF51_FICR_REG(0x098),
NRF51_FICR_IR3 = NRF51_FICR_REG(0x09C),
NRF51_FICR_DEVICEADDRTYPE = NRF51_FICR_REG(0x0A0),
NRF51_FICR_DEVICEADDR0 = NRF51_FICR_REG(0x0A4),
NRF51_FICR_DEVICEADDR1 = NRF51_FICR_REG(0x0A8),
NRF51_FICR_OVERRIDEN = NRF51_FICR_REG(0x0AC),
NRF51_FICR_NRF_1MBIT0 = NRF51_FICR_REG(0x0B0),
NRF51_FICR_NRF_1MBIT1 = 