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path: root/src/target/cortex_m.c
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2014-01-19cortexm: use Cortex-M rather than cortex-m3 for dwt registersSpencer Oliver
Change-Id: I28e3a8c65ccc4a4e3ec94e41c846e6a263c165e8 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1865 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2014-01-11cortex_m: Avoid unnecessary saving and restoring of DCRDRAndreas Fritiofson
This is used for the emulated DCC channel which is only maintained as long as target->dbg_msg_enabled is set. Skip the saving and restoring if not enabled to save one dap_run() per core register access. Note that we could've probably queued all core register accesses in the same transaction if the armv7 register framework hadn't required synchronous register accesses. Change-Id: I4fe6d713261ee5db42422203eb63035fdcc48891 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/1848 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2014-01-11cortex_m: Fix possible endianness problem in emulated DCC channelAndreas Fritiofson
Change-Id: If7104464a8c65085f3ceac445e9c9be8446f2da9 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/1846 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-10-31Clean up many C99 integer types format specifiersPaul Fertser
This eliminates most of the warnings reported when building for arm-none-eabi (newlib). Hsiangkai, there're many similar warnings left in your nds32 files, I didn't have the nerve to clean them all, probably you could pick it up. Change-Id: Id3bbe2ed2e3f1396290e55bea4c45068165a4810 Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1674 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-10-29cortex_m: set fpb_enabled on enabling fpbSpencer Oliver
If the fpb_enabled is not set then as part of cortex_m3_set_breakpoint we enable the fpb, however we do not signal the fpb as being enabled. This issue only effects the hla target as the current cortex_m code enables the fpb during cortex_m3_endreset_event. Change-Id: I44d3fc65916c131b7a226869dd16aed5afb441b4 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1634 Tested-by: jenkins
2013-10-10cortex_m: target implementation renames cortex_m3 to cortex_mSpencer Oliver
We changed the actual target name quite a while ago. This changes the actual target function names/defines to also match this change. Change-Id: I4f22fb107636db2279865b45350c9c776e608a75 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1626 Tested-by: jenkins
2013-10-02cortex_m: Call mem_ap_read/write directlyAndreas Fritiofson
Change-Id: I52e1d8babf7bf9fcde4094046d29b817c15c0562 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/1659 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-10-02cortex_m: mem_ap access functions take number of bytes, not wordsAndreas Fritiofson
Accessing one byte of memory using a 16-bit access is not well defined. The current implementation is forgiving and rounds up, but it should not be relied upon. Also, I suspect this code might fail if the byte order differs between target and host, but I have no way of verifying it so I left it as it is. Change-Id: I8d6a511151a194ed419f141703201f0632d84fc8 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/1657 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-09-21armv7m: remove gdb register hacksSpencer Oliver
Now that we support the target description format we do not need these hacks anymore, we can now tell gdb what registers we support. Change-Id: Ie774231d296420b35efcf708bc4435475c87ff5e Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1617 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-09-08armv7m: use consistent arm.cpsr memberSpencer Oliver
We already set cpsr in armv7m_build_reg_cache, so lets use it for all other accesses to this field. Change-Id: I19b3b21ecf1571bbea12e1be664845e6544f6fa1 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1539 Tested-by: jenkins
2013-07-26cortex_m: change cmd output to use cortex_m rather than cortex_m3Spencer Oliver
Change-Id: I33834910c44d22169bcf684e9697a8db49d0b396 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1513 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-07-01cortex_m: deprecate soft_reset_haltSpencer Oliver
soft_reset_halt was only really intended for the older arm arch, eg. armv4/5. Newer arch such as armv7m/mips do not need this as they have better alternatives. Change-Id: Ifb360680b7e4bfa5365f3c79d82574bded952b45 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1442 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-06-05update files to correct FSF addressSpencer Oliver
Change-Id: I429f7fd51f77b0e7c86d7a7f110ca31afd76c173 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1426 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2013-06-03cortex_m: print 'Cortex-M' rather than 'Cortex-M3'Spencer Oliver
This file is used by all the Cortex-M family not just Cortex-M3. Change-Id: Ie8680535b220c66bb8fcd862510407a46a73e8a0 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1429 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-05-29cortex_m, hla_target: do not try asserting SRST if it's not presentPaul Fertser
This should cover all the cases when RESET_SRST_NO_GATING is set without RESET_HAS_SRST. This might happen when RESET_SRST_NO_GATING is automatically set by a target code (and not from tcl). However, there're some other places (mips_m4k, arm7_9_common) where adding RESET_SRST_PULLS_TRST would lead to trying to use SRST even if it's not present. Currently it's impossible for the user to enable that flag without enabling SRST. Change-Id: Ib1c6f68feed0b8057d55afd5f260bb22ab332ced Signed-off-by: Paul Fertser <fercerpav@gmail.com> Reviewed-on: http://openocd.zylin.com/1405 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-04-28target: rename cortex_m3 to cortex_mSpencer Oliver
Rename cortex_m3 target to use a more correct cortex_m name. This also adds a deprecated_name var so that older scripts issue a warning to update the target name. cfg files have also been updated to the new target name. Change-Id: Ia8429f38e88da677249c5caa560c50f8ce56ea10 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1129 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-04-28cortex_m: remove old target breakpoints/watchpointsSpencer Oliver
Sometimes the target may have breakpoint registers set from a previous debug session, we can either sync them or as we have chosen here clear them. Change-Id: I439a623ebbf010246a70e5596d04aa7d546da731 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/1363 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2013-03-15target: Add default implementation of bulk_write_memoryAndreas Fritiofson
Remove dummy implementations from all targets except arm7_9 and mips, which are the only ones with real implementations. Replace with a single default implementation simply calling target_write_memory(). Change-Id: I9228104240bc0b50661be20bc7909713ccda2164 Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/1213 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-03-15cortex_a : optimize apb read/write access.Evan Hunter
Rewrite: Adheres more closely to 'fast read/write' examples in TRM. up to 50x faster Change-Id: Ieb4da57d8367628f3e7306827a5b1f0ab550e641 Signed-off-by: Evan Hunter <ehunter@broadcom.com> Reviewed-on: http://openocd.zylin.com/903 Tested-by: jenkins Reviewed-by: Michel JAOUEN <michel.jaouen@stericsson.com> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2013-02-02armv7m: use generic arm read/write_core_regSpencer Oliver
Change-Id: I0c15acc1278d2972269d294078495e6b069c830b Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/969 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-02-02armv7m: use generic register core_cacheSpencer Oliver
This removes the armv7m::core_cache and uses the generic arm::core_cache. Change-Id: If854281b31486cea8be005008f6a71a691b4c208 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/968 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-02-02armv7m: remove unused armv7m_regtypeSpencer Oliver
This simplifies the armv7m_core_reg structure ready for the move to using the generic struct arm_reg. Change-Id: I8edb9d77cc54965d49cd2e754568ebcea4cf6964 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/967 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2013-02-02armv7m: use generic arm::core_modeSpencer Oliver
To simplify things change over to using the generic core_mode struct rather than maintaining a armv7m specific one. Change-Id: Ibf32b785d896fef4f33307fabe0d8eb266f7086f Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/966 Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-12-23hla: fix watchpoints not being setSpencer Oliver
Watchpoints were not being enabled when the hl adapter target was resumed. This effects both stlink and icdi interfaces. Change-Id: Ia9f8a9415be97a467cd099b63b6bc9f7f37d0c0d Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/931 Tested-by: jenkins
2012-11-06cortex: autostep correctly handle user breakpointSpencer Oliver
If we halt due to a breakpoint make sure that we do not remove it during a step, only remove breakpoints we have created. Change-Id: I060168e54e53637d4fbf3cbcf62072efdb353807 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/947 Tested-by: jenkins
2012-11-06cortex_m: Fix single stepping will not return to debug mode sometimesPeter Horn
This occurs when stepping past a breakpoint on a even address with maskisr option set to auto With -d3 the following log message appears in this case: "Debug : Interrupt handlers didn't complete within time, leaving target running" Cause : Given a breakpoint is set on the lower half word and the PC is on the upper half word. When another breakpoint is now set on the current PC then resuming the core will not result in a break on the newly set breakpoint. This has been observed on a STM32F1x, STM32F2x (CM3) but not on a STM32F0x (CM0). It's not clear if this is a STM32F1/F2 only or a general CM3 problem. Change-Id: I384813f3bfdf935373b5e23cdb2d7f243c70cc00 Signed-off-by: Peter Horn <peter.horn@bluewin.ch> Reviewed-on: http://openocd.zylin.com/864 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-10-31Ensure Cortex-M reset wakes device from sleep (wfi/wfe)Evan Hunter
Change-Id: Idb52ca3123bb3e2f7863ba1b82ac9b176d7cb094 Signed-off-by: Evan Hunter <ehunter@broadcom.com> Reviewed-on: http://openocd.zylin.com/833 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-09-06cortex_m: suggest using hardware srst if VECTRESET usedSpencer Oliver
If the target does not support SYSRESETREQ we fall back to using VECTRESET. This however does not reset the peripherals and we issue a warning to the user to suggest using a reset-init script. Also suggest that using hardware srst will give them the same functionality as using SYSRESETREQ. Change-Id: Ie1781c4b849fed66c52222e6539735537c879fb3 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/802 Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-07-11target: Cortex-M use consistent arm dap accessSpencer Oliver
Purely cosmetic but use the same style as Cortex-A target, this makes searching refs easier. Change-Id: I732ad9701f561e2312c5d191f5aaffd3a2f2393d Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/731 Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com> Tested-by: jenkins Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
2012-07-11target: detect correct Cortex-M tar auto increment sizeSpencer Oliver
The ADIv5 spec guarentees that tar_autoincr_block will be 10bits. Make this the default for Cortex-M family until we detect a Cortex-M3/M4, we then change autoincrement to 12bits. Change-Id: Ie8c89134aa036879bdd8a3c312cee9715dbc6913 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/730 Tested-by: jenkins Reviewed-by: simon qian <simonqian.openocd@gmail.com> Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2012-05-21target: disable armv6m unaligned memory accessSpencer Oliver
Change-Id: I42704cf80939ab9c9d4f402d2cd51c196e2fadb3 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/645 Tested-by: jenkins
2012-05-14stlink: add armv7m stlink handlingSpencer Oliver
This enables us to better handle some of the low level functions that the stlink does not support. It also enables us to share a few more of the standard cortex_m3 functions if necessary. Change-Id: I7a2c57450122012ec189245d8879d8967913e00e Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/637 Tested-by: jenkins
2012-05-14cortex-m3: support connecting under resetSpencer Oliver
Some targets support connecting while the target's srst is asserted. Tested on stm32 family. Change-Id: I9df43623025e37832155aeee7aa099b844b85f16 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/606 Tested-by: jenkins
2012-04-10topic: add reset functions for SWDSimon Qian
Add swd_init_reset and swd_add_reset. Add adapter_assert_reset and adapter_deassert_reset, and call them instead of JTAG reset functions. Change-Id: Ib2551c6fbb45513e0ae0dc331cfe3ee3f922298a Signed-off-by: Simon Qian <simonqian.openocd@gmail.com> Reviewed-on: http://openocd.zylin.com/526 Tested-by: jenkins Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-03-30armv7m: detect floating point featureMathias K
This patch add fp feature detection on cortex-m4. Change-Id: I99e9d1bf5534630a22b8ad9c878165683db2d0ba Signed-off-by: Mathias K <kesmtp@freenet.de> Reviewed-on: http://openocd.zylin.com/524 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-03-14stm32: determine all cpu types and use common examineMathias K
This patch determine all cpu types and not only the cortex M3 and the stm32 target use the common target examine function from the cortex_m sources. Change-Id: If689dd994b3855284b927fc4b206f420cf32b6c7 Signed-off-by: Mathias K <kesmtp@freenet.de> Reviewed-on: http://openocd.zylin.com/511 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-03-13target: remove unused declarationSpencer Oliver
arm7_9_prepare_reset_halt is long since gone and the functionality is implemented in the target's assert_reset handler. Change-Id: Ib03c730cb39d68e5e3bb42f92af13daf8074e4e2 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/515 Tested-by: jenkins Reviewed-by: Peter Stuge <peter@stuge.se>
2012-02-06build: cleanup src/target directorySpencer Oliver
Change-Id: Ia055b6d2b5f6449a38afd0539a8c66e7d7e0c059 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/430 Tested-by: jenkins
2012-01-18target: move regmaps to armv7m.cSpencer Oliver
This move will enable use to share with regmaps with the stlink target. Change-Id: If8f41c7c53323d5074cb22ec3440530c1e402004 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/377 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-18cmd: add missing usage varsSpencer Oliver
we should have caught them all - hopefully. Change-Id: I35435317fccaf5ad0216244d69f76db6857bb582 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/381 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
2012-01-04retire ERROR_INVALID_ARGUMENTS and replace with ERROR_COMMAND_SYNTAX_ERRORØyvind Harboe
Change-Id: I6dee51e1fab1944085391f274a343cdb9014c7a4 Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com> Reviewed-on: http://openocd.zylin.com/300 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com> Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2012-01-03Make cortex_m3 functions public accessible.Mathias K
Change this functions to make it accessible for other target implementations. Change-Id: Ib41fc793cfb4de5439af026c2e8b52e7a9507c85 Signed-off-by: Mathias K <kesmtp@freenet.de> Reviewed-on: http://openocd.zylin.com/278 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-04cortex_m: initialize unused CPU variables to 0 for poll info outputØyvind Harboe
fixes warnings. Change-Id: I1a9ec09083d4e6269889fb79e6121f25e83eb396 Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com> Reviewed-on: http://openocd.zylin.com/163 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
2011-11-01cortex_m: add missing error checkingØyvind Harboe
found by clang. Change-Id: I099c6fe6b044dba36c20221cb439bdcba5a6bb6f Signed-off-by: Øyvind Harboe <oyvind.harboe@zylin.com> Reviewed-on: http://openocd.zylin.com/152 Tested-by: jenkins Reviewed-by: Peter Stuge <peter@stuge.se>
2011-11-01target: rename cortex_m3.[ch] to cortex_m.[ch]Spencer Oliver
This rename is in preparation for cortex_m4 support. Change-Id: Ic08c298ec6ed2aabc2c39db67191f68b3a51f550 Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk> Reviewed-on: http://openocd.zylin.com/147 Tested-by: jenkins Reviewed-by: Øyvind Harboe <oyvindharboe@gmail.com>
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