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-rwxr-xr-xtcl/target/cc32xx.cfg53
1 files changed, 53 insertions, 0 deletions
diff --git a/tcl/target/cc32xx.cfg b/tcl/target/cc32xx.cfg
new file mode 100755
index 00000000..ff654502
--- /dev/null
+++ b/tcl/target/cc32xx.cfg
@@ -0,0 +1,53 @@
+# Config for Texas Instruments SoC CC32xx family
+
+source [find target/swj-dp.tcl]
+
+adapter_khz 100
+
+source [find target/icepick.cfg]
+
+if { [info exists CHIPNAME] } {
+ set _CHIPNAME $CHIPNAME
+} else {
+ set _CHIPNAME cc32xx
+}
+
+#
+# Main DAP
+#
+if { [info exists DAP_TAPID] } {
+ set _DAP_TAPID $DAP_TAPID
+} else {
+ if {[using_jtag]} {
+ set _DAP_TAPID 0x4BA00477
+ } else {
+ set _DAP_TAPID 0x2BA01477
+ }
+}
+
+if {[using_jtag]} {
+ jtag newtap $_CHIPNAME dap -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id $_DAP_TAPID -disable
+ jtag configure $_CHIPNAME.dap -event tap-enable "icepick_c_tapenable $_CHIPNAME.jrc 0"
+} else {
+ swj_newdap $_CHIPNAME dap -expected-id $_DAP_TAPID
+}
+
+#
+# ICEpick-C (JTAG route controller)
+#
+if { [info exists JRC_TAPID] } {
+ set _JRC_TAPID $JRC_TAPID
+} else {
+ set _JRC_TAPID 0x0B97C02F
+}
+
+if {[using_jtag]} {
+ jtag newtap $_CHIPNAME jrc -irlen 6 -ircapture 0x1 -irmask 0x3f -expected-id $_JRC_TAPID -ignore-version
+ jtag configure $_CHIPNAME.jrc -event setup "jtag tapenable $_CHIPNAME.dap"
+}
+
+#
+# Cortex M3 target
+#
+set _TARGETNAME $_CHIPNAME.cpu
+target create $_TARGETNAME cortex_m -chain-position $_CHIPNAME.dap