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-rw-r--r--tcl/interface/ftdi/pipistrello.cfg2
1 files changed, 1 insertions, 1 deletions
diff --git a/tcl/interface/ftdi/pipistrello.cfg b/tcl/interface/ftdi/pipistrello.cfg
index b51405a2..5ee5be5b 100644
--- a/tcl/interface/ftdi/pipistrello.cfg
+++ b/tcl/interface/ftdi/pipistrello.cfg
@@ -10,4 +10,4 @@ ftdi_layout_init 0x0008 0x000b
reset_config none
# this generally works fast: the fpga can handle 30MHz, the spi flash can handle
# 54MHz with simple read, no dummy cycles, and wait-for-write-completion
-adapter_khz 30000
+adapter_khz 10000