cfg: Make stm32f4x usable with SWD transport

Change-Id: Ib8f3b414ec3c31cf8a112e75efe003e2237c59bb
Signed-off-by: Fatih Aşıcı <fatih.asici@gmail.com>
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/1951
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>

1 files changed, 13 insertions, 13 deletions

diff --git a/tcl/target/stm32f4x.cfg b/tcl/target/stm32f4x.cfg
index eafa1226..feca77c7 100644
--- a/tcl/target/stm32f4x.cfg
+++ b/tcl/target/stm32f4x.cfg
@@ -25,19 +25,6 @@ if { [info exists WORKAREASIZE] } {
    set _WORKAREASIZE 0x10000
 }
 
-# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
-#
-# Since we may be running of an RC oscilator, we crank down the speed a
-# bit more to be on the safe side. Perhaps superstition, but if are
-# running off a crystal, we can run closer to the limit. Note
-# that there can be a pretty wide band where things are more or less stable.
-adapter_khz 1000
-
-adapter_nsrst_delay 100
-if {$using_jtag} {
- jtag_ntrst_delay 100
-}
-
 #jtag scan chain
 if { [info exists CPUTAPID] } {
    set _CPUTAPID $CPUTAPID
@@ -73,6 +60,19 @@ $_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE
 set _FLASHNAME $_CHIPNAME.flash
 flash bank $_FLASHNAME stm32f2x 0 0 0 0 $_TARGETNAME
 
+# JTAG speed should be <= F_CPU/6. F_CPU after reset is 8MHz, so use F_JTAG = 1MHz
+#
+# Since we may be running of an RC oscilator, we crank down the speed a
+# bit more to be on the safe side. Perhaps superstition, but if are
+# running off a crystal, we can run closer to the limit. Note
+# that there can be a pretty wide band where things are more or less stable.
+adapter_khz 1000
+
+adapter_nsrst_delay 100
+if {$using_jtag} {
+ jtag_ntrst_delay 100
+}
+
 # if srst is not fitted use SYSRESETREQ to
 # perform a soft reset
 cortex_m reset_config sysresetreq