diff options
| author | Matthias Welwarsky <matthias.welwarsky@sysgo.com> | 2018-03-23 21:17:29 +0100 |
|---|---|---|
| committer | Matthias Welwarsky <matthias@welwarsky.de> | 2018-03-30 09:58:21 +0100 |
| commit | 2231da8ec4e7d7ae9b652f3dd1a7104f5a110f3f (patch) | |
| tree | 72623961be532d0f35e292a2fe9e8f1cf4e09c1a /tcl/target/lpc4370.cfg | |
| parent | 72740904568414bb4a9192fe89034bae3b1a9e45 (diff) | |
target: restructure dap support
- add 'dap create' command to create dap instances
- move all dap subcmmand into the dap instance commands
- keep 'dap info' for convenience
- change all armv7 and armv8 targets to take a dap
instance instead of a jtag chain position
- restructure tap/dap/target relations, jtag tap no
longer references the dap, daps are now independently
created and initialized.
- clean up swd connect
- re-initialize DAP also on JTAG errors (e.g. after reset,
power cycle)
- update documentation
- update target files
Change-Id: I322cf3969b5407c25d1d3962f9d9b9bc1df067d9
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4468
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Diffstat (limited to 'tcl/target/lpc4370.cfg')
| -rw-r--r-- | tcl/target/lpc4370.cfg | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/tcl/target/lpc4370.cfg b/tcl/target/lpc4370.cfg index 67bff0ad..1374ef27 100644 --- a/tcl/target/lpc4370.cfg +++ b/tcl/target/lpc4370.cfg @@ -47,8 +47,8 @@ if { [info exists M0_JTAG_TAPID] } { swj_newdap $_CHIPNAME m4 -irlen 4 -ircapture 0x1 -irmask 0xf \ -expected-id $_M4_TAPID - -target create $_CHIPNAME.m4 cortex_m -chain-position $_CHIPNAME.m4 +dap create $_CHIPNAME.m4.dap -chain-position $_CHIPNAME.m4 +target create $_CHIPNAME.m4 cortex_m -dap $_CHIPNAME.m4.dap # LPC4370 has 96+32 KB contiguous SRAM if { [info exists WORKAREASIZE] } { @@ -65,8 +65,10 @@ if { [using_jtag] } { jtag newtap $_CHIPNAME m0sub -irlen 4 -ircapture 0x1 -irmask 0xf \ -expected-id $_M0_JTAG_TAPID - target create $_CHIPNAME.m0app cortex_m -chain-position $_CHIPNAME.m0app - target create $_CHIPNAME.m0sub cortex_m -chain-position $_CHIPNAME.m0sub + dap create $_CHIPNAME.m0app.dap -chain-position $_CHIPNAME.m0app + dap create $_CHIPNAME.m0sub.dap -chain-position $_CHIPNAME.m0sub + target create $_CHIPNAME.m0app cortex_m -dap $_CHIPNAME.m0app.dap + target create $_CHIPNAME.m0sub cortex_m -dap $_CHIPNAME.m0sub.dap # 32+8+32 KB SRAM $_CHIPNAME.m0app configure -work-area-phys 0x10080000 \ |