diff options
| author | Leonard Crestez <leonard.crestez@nxp.com> | 2019-04-04 16:19:55 +0300 |
|---|---|---|
| committer | Matthias Welwarsky <matthias@welwarsky.de> | 2019-04-24 14:11:33 +0100 |
| commit | 23836fc5be5cc57f04267bee10c451e667c95143 (patch) | |
| tree | 8451ac3e468907beb1cfca3d76f3ff6ef56d5fb0 /tcl/target/imx6ul.cfg | |
| parent | b13055069c12fe0f8d60777b37f0df39d883e359 (diff) | |
target/imx6ul: Initial support
Unlike the rest of imx6 the 6UL 6ULL 6ULZ chips are based on Cortex-A7
which is at a different address so a custom script is required.
Tested on imx6ull-14x14-evk
Change-Id: I72822d2241045c318389fadbc66d7aaabaaf4cb5
Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
Reviewed-on: http://openocd.zylin.com/5040
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Diffstat (limited to 'tcl/target/imx6ul.cfg')
| -rw-r--r-- | tcl/target/imx6ul.cfg | 50 |
1 files changed, 50 insertions, 0 deletions
diff --git a/tcl/target/imx6ul.cfg b/tcl/target/imx6ul.cfg new file mode 100644 index 00000000..f42aa636 --- /dev/null +++ b/tcl/target/imx6ul.cfg @@ -0,0 +1,50 @@ +# +# Freescale i.MX6UltraLite series: 6UL 6ULL 6ULZ +# + +if { [info exists CHIPNAME] } { + set _CHIPNAME $CHIPNAME +} else { + set _CHIPNAME imx6ul +} + +# CoreSight Debug Access Port +if { [info exists DAP_TAPID] } { + set _DAP_TAPID $DAP_TAPID +} else { + set _DAP_TAPID 0x4ba00477 +} + +jtag newtap $_CHIPNAME cpu -irlen 4 -ircapture 0x01 -irmask 0x0f \ + -expected-id $_DAP_TAPID + +# SDMA / no IDCODE +jtag newtap $_CHIPNAME sdma -irlen 4 -ircapture 0x00 -irmask 0x0f + +# System JTAG Controller +set _SJC_TAPID_6UL 0x0891d01d +set _SJC_TAPID_6ULL 0x0891e01d +set _SJC_TAPID_6ULZ 0x1891e01d + +# Allow external override of the first SJC TAPID +if { [info exists SJC_TAPID] } { + set _SJC_TAPID $SJC_TAPID +} else { + set _SJC_TAPID $_SJC_TAPID_6UL +} + +jtag newtap $_CHIPNAME sjc -irlen 5 -ircapture 0x01 -irmask 0x1f \ + -ignore-version \ + -expected-id $_SJC_TAPID \ + -expected-id $_SJC_TAPID_6ULL \ + -expected-id $_SJC_TAPID_6ULZ \ + +# Create DAP +dap create $_CHIPNAME.dap -chain-position $_CHIPNAME.cpu + +# Main AHB bus +target create $_CHIPNAME.ahb mem_ap -dap $_CHIPNAME.dap -ap-num 0 + +# Cortex-A7 single core +set _TARGETNAME $_CHIPNAME.cpu +target create $_TARGETNAME cortex_a -dap $_CHIPNAME.dap -dbgbase 0x82130000 |