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author | Marek Vasut <marek.vasut@gmail.com> | 2018-10-05 22:48:04 +0200 |
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committer | Matthias Welwarsky <matthias@welwarsky.de> | 2019-05-20 11:16:54 +0100 |
commit | 82e3a0e7cfa596e1b33e924036c82ab652b51619 (patch) | |
tree | 7b3e245e1e3923ea21204128b5b05698a1664d7c /tcl/target/exynos5250.cfg | |
parent | 5b053ffd438714bbc0b002aaa5f0f0634a0f3fe2 (diff) |
tcl/target: Add Renesas RZ/A1H target
Add configuration for the Renesas RZ/A1H target.
This is an SoC with one Cortex A9 ARMv7a core and
up to 10 MiB of on-SoC SRAM.
Change-Id: I20fd54b385fe1ba1cc325451c3fdfa3a835d4884
Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Reviewed-on: http://openocd.zylin.com/5141
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Diffstat (limited to 'tcl/target/exynos5250.cfg')
0 files changed, 0 insertions, 0 deletions