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authorRobert Jordens <jordens@gmail.com>2015-07-01 23:29:34 -0600
committerSpencer Oliver <spen@spen-soft.co.uk>2015-08-06 13:14:13 +0100
commit804eefc25954465a35e63abc272862169dbf4b9b (patch)
tree01df6fee5ebf4e82ba2fdc2840d6baf33a406fbe /tcl/interface
parentd25355473da9a925a696183a9947aac292cd2f60 (diff)
pipistrello: ftdi-jtag/spartan6/jtagspi board
The Pipistrello is a low cost FPGA board with a Xilinx Spartan6 LX45, a SPI flash and onboard FTDI JTAG. This board is a good example use case for the jtagspi flash driver talking through a proxy bitstream. Change-Id: I04a80610ff825c36ebcb67b879507028eed141ad Signed-off-by: Robert Jordens <jordens@gmail.com> Reviewed-on: http://openocd.zylin.com/2846 Tested-by: jenkins Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Diffstat (limited to 'tcl/interface')
-rw-r--r--tcl/interface/ftdi/pipistrello.cfg13
1 files changed, 13 insertions, 0 deletions
diff --git a/tcl/interface/ftdi/pipistrello.cfg b/tcl/interface/ftdi/pipistrello.cfg
new file mode 100644
index 00000000..b51405a2
--- /dev/null
+++ b/tcl/interface/ftdi/pipistrello.cfg
@@ -0,0 +1,13 @@
+# http://pipistrello.saanlima.com/
+# http://www.saanlima.com/download/pipistrello-v2.0/pipistrello_v2_schematic.pdf
+interface ftdi
+ftdi_device_desc "Pipistrello LX45"
+ftdi_vid_pid 0x0403 0x6010
+# interface 1 is the uart
+ftdi_channel 0
+# just TCK TDI TDO TMS, no reset
+ftdi_layout_init 0x0008 0x000b
+reset_config none
+# this generally works fast: the fpga can handle 30MHz, the spi flash can handle
+# 54MHz with simple read, no dummy cycles, and wait-for-write-completion
+adapter_khz 30000