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author | Tarek BOCHKATI <tarek.bouchkati@gmail.com> | 2019-12-09 12:47:07 +0100 |
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committer | Antonio Borneo <borneo.antonio@gmail.com> | 2020-03-12 09:47:08 +0000 |
commit | a8b1bd8376ad30e8ffe7d4d87ed0b041d7adbe76 (patch) | |
tree | 91b29433e52e5fa7bf3360495b6e5bff9f391828 /tcl/cpu | |
parent | a154973896576ae59952785e7b2137fb17dac7da (diff) |
target/armv8_opcodes: use T32 instructions when the PE is in AArch32 state
As stated in ARM v8-A Architecture Reference Manual (ARM DDI 0487E.a)
in Chapter H4.3 DCC and ITR access modes:
Writes to EDITR trigger the instruction to be executed if the PE
is in Debug state:
- If the PE is in AArch64 state, this is an A64 instruction.
- If the PE is in AArch32 state, this is a T32 instruction
But in armv8_opcodes specifically in t32_opcodes we were using some
A32 instructions for HLT, LDRx and STRx opcodes.
Using the correct LDRx and STRx opcodes, fixes 16 and 8 bits memory access
when the PE is in AArch32 state.
Change-Id: Ib1acbdd4966297e7b069569bcb8deea3c3993615
Signed-off-by: Tarek BOCHKATI <tarek.bouchkati@gmail.com>
Reviewed-on: http://openocd.zylin.com/5346
Tested-by: jenkins
Reviewed-by: Muhammad Omair Javaid <omair.javaid@linaro.org>
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Diffstat (limited to 'tcl/cpu')
0 files changed, 0 insertions, 0 deletions