diff options
| author | Matthias Welwarsky <matthias.welwarsky@sysgo.com> | 2018-01-22 12:28:37 +0100 |
|---|---|---|
| committer | Matthias Welwarsky <matthias@welwarsky.de> | 2018-01-26 10:53:09 +0000 |
| commit | a640f139baa9fe4f44d428b1e4e1a9da245532ca (patch) | |
| tree | 02ff1daddbf2292982547ebfed987cd4a03fb500 /src | |
| parent | 64f1f7b1c179dcce4e008bef6bf9515c47ae4100 (diff) | |
aarch64: implement mmu on/off for aarch32
add decoding of aarch32 core modes (register layout is compatible)
Change-Id: I34c3146a7b1f836d3006be2b76b036da055b3d3e
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4374
Tested-by: jenkins
Reviewed-by: Forest Crossman <cyrozap@gmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Diffstat (limited to 'src')
| -rw-r--r-- | src/target/aarch64.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/src/target/aarch64.c b/src/target/aarch64.c index 784274a0..bcfce659 100644 --- a/src/target/aarch64.c +++ b/src/target/aarch64.c @@ -161,8 +161,16 @@ static int aarch64_mmu_modify(struct target *target, int enable) case ARMV8_64_EL3T: instr = ARMV8_MSR_GP(SYSTEM_SCTLR_EL3, 0); break; + + case ARM_MODE_SVC: + case ARM_MODE_ABT: + case ARM_MODE_FIQ: + case ARM_MODE_IRQ: + instr = ARMV4_5_MCR(15, 0, 0, 1, 0, 0); + break; + default: - LOG_DEBUG("unknown cpu state 0x%x" PRIx32, armv8->arm.core_state); + LOG_DEBUG("unknown cpu state 0x%" PRIx32, armv8->arm.core_mode); break; } |