aboutsummaryrefslogtreecommitdiff
path: root/src/target/x86_32_common.h
diff options
context:
space:
mode:
authorFelipe Balbi <felipe.balbi@linux.intel.com>2017-02-24 15:26:39 +0200
committerPaul Fertser <fercerpav@gmail.com>2018-01-13 09:25:34 +0000
commit2b44b52478708c3bef58033dfd4f7bb7db74d843 (patch)
tree5578d80d53beafe80605eb49b1e1ad05760a75c7 /src/target/x86_32_common.h
parent3accbec9010c3f98dbe3795e438412e45d5b9ce5 (diff)
target: lakemon: implement assert_reset and deassert_reset
We're using an I/O port reset by default. The only board currently supported (Galileo) doesn't have SRST routed on the JTAG connector. When using 'reset halt', we must rely on Reset Break because our adapters don't have support for PREQ#/PRDY# signals. Tested with Intel Galileo GEN2. Change-Id: Ia406e31c156f8001717d5b6a08bd03f71de790d3 Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> Reviewed-on: http://openocd.zylin.com/4016 Tested-by: jenkins Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Diffstat (limited to 'src/target/x86_32_common.h')
-rw-r--r--src/target/x86_32_common.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/target/x86_32_common.h b/src/target/x86_32_common.h
index 0aaa963d..14e6e35f 100644
--- a/src/target/x86_32_common.h
+++ b/src/target/x86_32_common.h
@@ -217,6 +217,7 @@ struct x86_32_common {
struct reg_cache *cache;
struct jtag_tap *curr_tap;
uint32_t stored_pc;
+ int forced_halt_for_reset;
int flush;
/* pm_regs are for probemode save/restore state */
@@ -326,5 +327,6 @@ int x86_32_common_add_breakpoint(struct target *t, struct breakpoint *bp);
int x86_32_common_remove_breakpoint(struct target *t, struct breakpoint *bp);
int x86_32_common_add_watchpoint(struct target *t, struct watchpoint *wp);
int x86_32_common_remove_watchpoint(struct target *t, struct watchpoint *wp);
+void x86_32_common_reset_breakpoints_watchpoints(struct target *t);
#endif /* OPENOCD_TARGET_X86_32_COMMON_H */