aboutsummaryrefslogtreecommitdiff
path: root/src/target/cortex_a.c
diff options
context:
space:
mode:
authorAntonio Borneo <borneo.antonio@gmail.com>2019-06-25 16:01:38 +0200
committerAntonio Borneo <borneo.antonio@gmail.com>2020-03-12 10:11:19 +0000
commitb5d2b1224fed3909aa3314339611ac5ac7ab0f82 (patch)
tree5e38e99cfe6dbdf131b4b452948b3b889b7eac23 /src/target/cortex_a.c
parent6900c5af4ec3f6df52227169d7d897eb14a44bca (diff)
target/cortex_a: add hypervisor mode
Hypervisor mode is present only if the optional virtualization extensions are available. Moreover, virtualization extensions require that also security extensions are implemented. Add the required infrastructure for the shadowed registers in hypervisor mode. Make monitor shadowed registers visible in hypervisor mode too. Make hypervisor shadowed registers visible in hypervisor mode only. Check during cortex_a examine if virtualization extensions are present and then conditionally enable the visibility of both hypervisor and monitor modes shadowed registers. Change-Id: I81dbb1ee8baf4c9f1a2226b77c10c8a2a7b34871 Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com> Reviewed-on: http://openocd.zylin.com/5261 Tested-by: jenkins
Diffstat (limited to 'src/target/cortex_a.c')
-rw-r--r--src/target/cortex_a.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c
index 22cbc3d0..729a173e 100644
--- a/src/target/cortex_a.c
+++ b/src/target/cortex_a.c
@@ -2797,6 +2797,15 @@ static int cortex_a_examine_first(struct target *target)
target->coreid);
armv7a->arm.core_type = ARM_CORE_TYPE_SEC_EXT;
}
+ if (dbg_idpfr1 & 0x0000f000) {
+ LOG_DEBUG("target->coreid %" PRId32 " has virtualization extensions",
+ target->coreid);
+ /*
+ * overwrite and simplify the checks.
+ * virtualization extensions require implementation of security extension
+ */
+ armv7a->arm.core_type = ARM_CORE_TYPE_VIRT_EXT;
+ }
/* Avoid recreating the registers cache */
if (!target_was_examined(target)) {