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| author | Matthias Welwarsky <matthias.welwarsky@sysgo.com> | 2016-09-20 11:16:30 +0200 |
|---|---|---|
| committer | Matthias Welwarsky <matthias.welwarsky@sysgo.com> | 2017-02-10 14:01:39 +0100 |
| commit | e17d1d4dc870155010422095272d8a6c16435451 (patch) | |
| tree | d9ab16bf174b07930f58c9f7f58a76b68413a19a /src/target/armv8_opcodes.h | |
| parent | b430d0a1520903213e0796e9fcbc5ab180f1fbe8 (diff) | |
aarch64: add cache handling functions
For now only D-Cache flush (Clean&Invalidate) and I-Cache
invalidate are implemented. That's enough for software breakpoints.
Change-Id: I8e96d645a230b51e3490403f4564e59ba6a76cf3
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Diffstat (limited to 'src/target/armv8_opcodes.h')
| -rw-r--r-- | src/target/armv8_opcodes.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/target/armv8_opcodes.h b/src/target/armv8_opcodes.h index a1fb5d4d..89d7440a 100644 --- a/src/target/armv8_opcodes.h +++ b/src/target/armv8_opcodes.h @@ -82,6 +82,7 @@ #define SYSTEM_DCCSW 0b0100001111010010 #define SYSTEM_ICIVAU 0b0101101110101001 #define SYSTEM_DCCVAU 0b0101101111011001 +#define SYSTEM_DCCIVAC 0b0101101111110001 #define SYSTEM_MPIDR 0b1100000000000101 @@ -125,5 +126,6 @@ #define ARMV8_MOVFSP_32(Rt) (0x11000000 | (0x1f << 5) | (Rt)) #define ARMV8_MOVTSP_32(Rt) (0x11000000 | (Rt << 5) | (0x1F)) +#define ARMV8_SYS(System, Rt) (0xD5080000 | ((System) << 5) | Rt) #endif /* __ARM_OPCODES_H */ |