diff options
| author | Antonio Borneo <borneo.antonio@gmail.com> | 2019-06-24 18:28:31 +0200 |
|---|---|---|
| committer | Antonio Borneo <borneo.antonio@gmail.com> | 2020-03-12 10:10:33 +0000 |
| commit | 6900c5af4ec3f6df52227169d7d897eb14a44bca (patch) | |
| tree | 7184ed8e9a6ffbe67dfd0371cafd290e73248d2b /src/target/armv7a.h | |
| parent | 9626402c5a65423d4e4e9091f710b542522ca125 (diff) | |
armv7a: access monitor registers only with security extensions
Accordingly to ARM DDI 0406C at B1.5, the security extensions for
armv7a are optional extensions and can be detected by reading
ID_PFR1.
The monitor mode is part of the security extensions and the shadow
registers "sp_mon", "lr_mon" and "spsr_mon" are only present with
the security extensions.
Read the register ID_PFR1 during cortex_a examine, determine if
security extension is present and then conditionally enable the
visibility of the monitor mode shadow registers.
Change-Id: Ib4834698659046566f6dc5cd35b44de122dc02e5
Signed-off-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-on: http://openocd.zylin.com/5259
Tested-by: jenkins
Diffstat (limited to 'src/target/armv7a.h')
| -rw-r--r-- | src/target/armv7a.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/target/armv7a.h b/src/target/armv7a.h index 0ef04c16..3d88c867 100644 --- a/src/target/armv7a.h +++ b/src/target/armv7a.h @@ -178,6 +178,9 @@ static inline bool is_armv7a(struct armv7a_common *armv7a) /* See ARMv7a arch spec section C10.8 */ #define CPUDBG_AUTHSTATUS 0xFB8 +/* See ARMv7a arch spec DDI 0406C C11.10 */ +#define CPUDBG_ID_PFR1 0xD24 + /* Masks for Vector Catch register */ #define DBG_VCR_FIQ_MASK ((1 << 31) | (1 << 7)) #define DBG_VCR_IRQ_MASK ((1 << 30) | (1 << 6)) |