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authorAndreas Fritiofson <andreas.fritiofson@gmail.com>2016-02-10 21:37:16 +0100
committerAndreas Fritiofson <andreas.fritiofson@gmail.com>2016-02-22 23:15:57 +0000
commitcf49e04429202e832ea642d1fdfec9570fd20f17 (patch)
treedb69b6fe29e9faf52e841a4fe901c1421b63e9d5 /src/flash/nor/xmc4xxx.c
parentfeaea8632f7e7b5fd6ec428058a5f726755cbf9a (diff)
adi_v5_swd: Avoid special handling the SELECT cache during connect
The cache is forced to zero to match the value expected by the DPIDR read so the connect sequence is not destroyed by a SELECT update. However, DPIDR and in fact all registers except address 4 are independent of the current DPBANKSEL value. Change swd_queue_dp_bankselect() to use this fact and avoid touching SELECT for those registers. Change-Id: I0cd11925fb6adef481bbf45cc24ea2c6dab4b6fb Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com> Reviewed-on: http://openocd.zylin.com/3231 Tested-by: jenkins Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Diffstat (limited to 'src/flash/nor/xmc4xxx.c')
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