build: cleanup src/flash/nand directory

Change-Id: I21bb466a35168cf04743f5baafac9fef50d01707
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/419
Tested-by: jenkins

32 files changed, 2085 insertions, 2380 deletions

diff --git a/src/flash/nand/arm_io.c b/src/flash/nand/arm_io.c
index 431ac908..cf494766 100644
--- a/src/flash/nand/arm_io.c
+++ b/src/flash/nand/arm_io.c
@@ -30,7 +30,6 @@
 #include <target/arm.h>
 #include <target/algorithm.h>
 
-
 /**
  * Copies code to a working area.  This will allocate room for the code plus the
  * additional amount requested if the working area pointer is null.
@@ -44,8 +43,8 @@
  * @return Success or failure of the operation
  */
 static int arm_code_to_working_area(struct target *target,
-		const uint32_t *code, unsigned code_size,
-		unsigned additional, struct working_area **area)
+	const uint32_t *code, unsigned code_size,
+	unsigned additional, struct working_area **area)
 {
 	uint8_t code_buf[code_size];
 	unsigned i;
@@ -61,7 +60,7 @@ static int arm_code_to_working_area(struct target *target,
 	if (NULL == *area) {
 		retval = target_alloc_working_area(target, size, area);
 		if (retval != ERROR_OK) {
-			LOG_DEBUG("%s: no %d byte buffer", __FUNCTION__, (int) size);
+			LOG_DEBUG("%s: no %d byte buffer", __func__, (int) size);
 			return ERROR_NAND_NO_BUFFER;
 		}
 	}
@@ -95,13 +94,13 @@ static int arm_code_to_working_area(struct target *target,
  */
 int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size)
 {
-	struct target		*target = nand->target;
-	struct arm_algorithm	algo;
-	struct arm		*arm = target->arch_info;
-	struct reg_param	reg_params[3];
-	uint32_t		target_buf;
-	uint32_t		exit_var = 0;
-	int			retval;
+	struct target *target = nand->target;
+	struct arm_algorithm algo;
+	struct arm *arm = target->arch_info;
+	struct reg_param reg_params[3];
+	uint32_t target_buf;
+	uint32_t exit_var = 0;
+	int retval;
 
 	/* Inputs:
 	 *  r0	NAND data address (byte wide)
@@ -121,9 +120,8 @@ int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size)
 	if (nand->op != ARM_NAND_WRITE || !nand->copy_area) {
 		retval = arm_code_to_working_area(target, code, sizeof(code),
 				nand->chunk_size, &nand->copy_area);
-		if (retval != ERROR_OK) {
+		if (retval != ERROR_OK)
 			return retval;
-		}
 	}
 
 	nand->op = ARM_NAND_WRITE;
@@ -206,9 +204,8 @@ int arm_nandread(struct arm_nand_data *nand, uint8_t *data, uint32_t size)
 	if (nand->op != ARM_NAND_READ || !nand->copy_area) {
 		retval = arm_code_to_working_area(target, code, sizeof(code),
 				nand->chunk_size, &nand->copy_area);
-		if (retval != ERROR_OK) {
+		if (retval != ERROR_OK)
 			return retval;
-		}
 	}
 
 	nand->op = ARM_NAND_READ;
@@ -246,4 +243,3 @@ int arm_nandread(struct arm_nand_data *nand, uint8_t *data, uint32_t size)
 
 	return retval;
 }
-
diff --git a/src/flash/nand/arm_io.h b/src/flash/nand/arm_io.h
index 2e825bf8..a8a4396b 100644
--- a/src/flash/nand/arm_io.h
+++ b/src/flash/nand/arm_io.h
@@ -23,9 +23,9 @@
  * Available operational states the arm_nand_data struct can be in.
  */
 enum arm_nand_op {
-	ARM_NAND_NONE, /**< No operation performed. */
-	ARM_NAND_READ, /**< Read operation performed. */
-	ARM_NAND_WRITE, /**< Write operation performed. */
+	ARM_NAND_NONE,	/**< No operation performed. */
+	ARM_NAND_READ,	/**< Read operation performed. */
+	ARM_NAND_WRITE,	/**< Write operation performed. */
 };
 
 /**
@@ -37,7 +37,7 @@ struct arm_nand_data {
 	struct target *target;
 
 	/** The copy area holds code loop and data for I/O operations. */
-	struct working_area	*copy_area;
+	struct working_area *copy_area;
 
 	/** The chunk size is the page size or ECC chunk. */
 	unsigned chunk_size;
@@ -54,4 +54,4 @@ struct arm_nand_data {
 int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size);
 int arm_nandread(struct arm_nand_data *nand, uint8_t *data, uint32_t size);
 
-#endif /* __ARM_NANDIO_H */
+#endif	/* __ARM_NANDIO_H */
diff --git a/src/flash/nand/at91sam9.c b/src/flash/nand/at91sam9.c
index 42924c98..4f0f6470 100644
--- a/src/flash/nand/at91sam9.c
+++ b/src/flash/nand/at91sam9.c
@@ -17,6 +17,7 @@
  * Free Software Foundation, Inc.,
  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  */
+
 #ifdef HAVE_CONFIG_H
 #include "config.h"
 #endif
@@ -26,13 +27,13 @@
 #include "imp.h"
 #include "arm_io.h"
 
-#define AT91C_PIOx_SODR (0x30) /**< Offset to PIO SODR. */
-#define AT91C_PIOx_CODR (0x34) /**< Offset to PIO CODR. */
-#define AT91C_PIOx_PDSR (0x3C) /**< Offset to PIO PDSR. */
-#define AT91C_ECCx_CR (0x00) /**< Offset to ECC CR. */
-#define AT91C_ECCx_SR (0x08) /**< Offset to ECC SR. */
-#define AT91C_ECCx_PR (0x0C) /**< Offset to ECC PR. */
-#define AT91C_ECCx_NPR (0x10) /**< Offset to ECC NPR. */
+#define AT91C_PIOx_SODR (0x30)	/**< Offset to PIO SODR. */
+#define AT91C_PIOx_CODR (0x34)	/**< Offset to PIO CODR. */
+#define AT91C_PIOx_PDSR (0x3C)	/**< Offset to PIO PDSR. */
+#define AT91C_ECCx_CR (0x00)	/**< Offset to ECC CR. */
+#define AT91C_ECCx_SR (0x08)	/**< Offset to ECC SR. */
+#define AT91C_ECCx_PR (0x0C)	/**< Offset to ECC PR. */
+#define AT91C_ECCx_NPR (0x10)	/**< Offset to ECC NPR. */
 
 /**
  * Representation of a pin on an AT91SAM9 chip.
@@ -97,9 +98,8 @@ static int at91sam9_init(struct nand_device *nand)
 {
 	struct target *target = nand->target;
 
-	if (!at91sam9_halted(target, "init")) {
+	if (!at91sam9_halted(target, "init"))
 		return ERROR_NAND_OPERATION_FAILED;
-	}
 
 	return ERROR_OK;
 }
@@ -144,9 +144,8 @@ static int at91sam9_command(struct nand_device *nand, uint8_t command)
 	struct at91sam9_nand *info = nand->controller_priv;
 	struct target *target = nand->target;
 
-	if (!at91sam9_halted(target, "command")) {
+	if (!at91sam9_halted(target, "command"))
 		return ERROR_NAND_OPERATION_FAILED;
-	}
 
 	at91sam9_enable(nand);
 
@@ -161,9 +160,8 @@ static int at91sam9_command(struct nand_device *nand, uint8_t command)
  */
 static int at91sam9_reset(struct nand_device *nand)
 {
-	if (!at91sam9_halted(nand->target, "reset")) {
+	if (!at91sam9_halted(nand->target, "reset"))
 		return ERROR_NAND_OPERATION_FAILED;
-	}
 
 	return at91sam9_disable(nand);
 }
@@ -180,9 +178,8 @@ static int at91sam9_address(struct nand_device *nand, uint8_t address)
 	struct at91sam9_nand *info = nand->controller_priv;
 	struct target *target = nand->target;
 
-	if (!at91sam9_halted(nand->target, "address")) {
+	if (!at91sam9_halted(nand->target, "address"))
 		return ERROR_NAND_OPERATION_FAILED;
-	}
 
 	return target_write_u8(target, info->addr, address);
 }
@@ -200,9 +197,8 @@ static int at91sam9_read_data(struct nand_device *nand, void *data)
 	struct at91sam9_nand *info = nand->controller_priv;
 	struct target *target = nand->target;
 
-	if (!at91sam9_halted(nand->target, "read data")) {
+	if (!at91sam9_halted(nand->target, "read data"))
 		return ERROR_NAND_OPERATION_FAILED;
-	}
 
 	return target_read_u8(target, info->data, data);
 }
@@ -220,9 +216,8 @@ static int at91sam9_write_data(struct nand_device *nand, uint16_t data)
 	struct at91sam9_nand *info = nand->controller_priv;
 	struct target *target = nand->target;
 
-	if (!at91sam9_halted(target, "write data")) {
+	if (!at91sam9_halted(target, "write data"))
 		return ERROR_NAND_OPERATION_FAILED;
-	}
 
 	return target_write_u8(target, info->data, data);
 }
@@ -240,16 +235,14 @@ static int at91sam9_nand_ready(struct nand_device *nand, int timeout)
 	struct target *target = nand->target;
 	uint32_t status;
 
-	if (!at91sam9_halted(target, "nand ready")) {
+	if (!at91sam9_halted(target, "nand ready"))
 		return 0;
-	}
 
 	do {
 		target_read_u32(target, info->busy.pioc + AT91C_PIOx_PDSR, &status);
 
-		if (status & (1 << info->busy.num)) {
+		if (status & (1 << info->busy.num))
 			return 1;
-		}
 
 		alive_sleep(1);
 	} while (timeout-- > 0);
@@ -272,9 +265,8 @@ static int at91sam9_read_block_data(struct nand_device *nand, uint8_t *data, int
 	struct arm_nand_data *io = &info->io;
 	int status;
 
-	if (!at91sam9_halted(nand->target, "read block")) {
+	if (!at91sam9_halted(nand->target, "read block"))
 		return ERROR_NAND_OPERATION_FAILED;
-	}
 
 	io->chunk_size = nand->page_size;
 	status = arm_nandread(io, data, size);
@@ -297,9 +289,8 @@ static int at91sam9_write_block_data(struct nand_device *nand, uint8_t *data, in
 	struct arm_nand_data *io = &info->io;
 	int status;
 
-	if (!at91sam9_halted(nand->target, "write block")) {
+	if (!at91sam9_halted(nand->target, "write block"))
 		return ERROR_NAND_OPERATION_FAILED;
-	}
 
 	io->chunk_size = nand->page_size;
 	status = arm_nandwrite(io, data, size);
@@ -321,7 +312,7 @@ static int at91sam9_ecc_init(struct target *target, struct at91sam9_nand *info)
 		return ERROR_NAND_OPERATION_FAILED;
 	}
 
-	// reset ECC parity registers
+	/* reset ECC parity registers */
 	return target_write_u32(target, info->ecc + AT91C_ECCx_CR, 1);
 }
 
@@ -335,15 +326,14 @@ static int at91sam9_ecc_init(struct target *target, struct at91sam9_nand *info)
  * @param size Size of the OOB.
  * @return Pointer to an area to store OOB data.
  */
-static uint8_t * at91sam9_oob_init(struct nand_device *nand, uint8_t *oob, uint32_t *size)
+static uint8_t *at91sam9_oob_init(struct nand_device *nand, uint8_t *oob, uint32_t *size)
 {
 	if (!oob) {
-		// user doesn't want OOB, allocate it
-		if (nand->page_size == 512) {
+		/* user doesn't want OOB, allocate it */
+		if (nand->page_size == 512)
 			*size = 16;
-		} else if (nand->page_size == 2048) {
+		else if (nand->page_size == 2048)
 			*size = 64;
-		}
 
 		oob = malloc(*size);
 		if (!oob) {
@@ -371,7 +361,7 @@ static uint8_t * at91sam9_oob_init(struct nand_device *nand, uint8_t *oob, uint3
  * @return Success or failure of reading the NAND page.
  */
 static int at91sam9_read_page(struct nand_device *nand, uint32_t page,
-		uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
+	uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
 {
 	int retval;
 	struct at91sam9_nand *info = nand->controller_priv;
@@ -380,20 +370,17 @@ static int at91sam9_read_page(struct nand_device *nand, uint32_t page,
 	uint32_t status;
 
 	retval = at91sam9_ecc_init(target, info);
-	if (ERROR_OK != retval) {
+	if (ERROR_OK != retval)
 		return retval;
-	}
 
 	retval = nand_page_command(nand, page, NAND_CMD_READ0, !data);
-	if (ERROR_OK != retval) {
+	if (ERROR_OK != retval)
 		return retval;
-	}
 
 	if (data) {
 		retval = nand_read_data_page(nand, data, data_size);
-		if (ERROR_OK != retval) {
+		if (ERROR_OK != retval)
 			return retval;
-		}
 	}
 
 	oob_data = at91sam9_oob_init(nand, oob, &oob_size);
@@ -402,33 +389,33 @@ static int at91sam9_read_page(struct nand_device *nand, uint32_t page,
 		target_read_u32(target, info->ecc + AT91C_ECCx_SR, &status);
 		if (status & 1) {
 			LOG_ERROR("Error detected!");
-			if (status & 4) {
+			if (status & 4)
 				LOG_ERROR("Multiple errors encountered; unrecoverable!");
-			} else {
-				// attempt recovery
+			else {
+				/* attempt recovery */
 				uint32_t parity;
 
 				target_read_u32(target,
-						info->ecc + AT91C_ECCx_PR,
-						&parity);
+					info->ecc + AT91C_ECCx_PR,
+					&parity);
 				uint32_t word = (parity & 0x0000FFF0) >> 4;
 				uint32_t bit = parity & 0x0F;
 
 				data[word] ^= (0x1) << bit;
 				LOG_INFO("Data word %d, bit %d corrected.",
-						(unsigned) word,
-						(unsigned) bit);
+					(unsigned) word,
+					(unsigned) bit);
 			}
 		}
 
 		if (status & 2) {
-			// we could write back correct ECC data
+			/* we could write back correct ECC data */
 			LOG_ERROR("Error in ECC bytes detected");
 		}
 	}
 
 	if (!oob) {
-		// if it wasn't asked for, free it
+		/* if it wasn't asked for, free it */
 		free(oob_data);
 	}
 
@@ -449,7 +436,7 @@ static int at91sam9_read_page(struct nand_device *nand, uint32_t page,
  * @return Success or failure of the page write.
  */
 static int at91sam9_write_page(struct nand_device *nand, uint32_t page,
-		uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
+	uint8_t *data, uint32_t data_size, uint8_t *oob, uint32_t oob_size)
 {
 	struct at91sam9_nand *info = nand->controller_priv;
 	struct target *target = nand->target;
@@ -458,14 +445,12 @@ static int at91sam9_write_page(struct nand_device *nand, uint32_t page,
 	uint32_t parity, nparity;
 
 	retval = at91sam9_ecc_init(target, info);
-	if (ERROR_OK != retval) {
+	if (ERROR_OK != retval)
 		return retval;
-	}
 
 	retval = nand_page_command(nand, page, NAND_CMD_SEQIN, !data);
-	if (ERROR_OK != retval) {
+	if (ERROR_OK != retval)
 		return retval;
-	}
 
 	if (data) {
 		retval = nand_write_data_page(nand, data, data_size);
@@ -478,7 +463,7 @@ static int at91sam9_write_page(struct nand_device *nand, uint32_t page,
 	oob_data = at91sam9_oob_init(nand, oob, &oob_size);
 
 	if (!oob) {
-		// no OOB given, so read in the ECC parity from the ECC controller
+		/* no OOB given, so read in the ECC parity from the ECC controller */
 		target_read_u32(target, info->ecc + AT91C_ECCx_PR, &parity);
 		target_read_u32(target, info->ecc + AT91C_ECCx_NPR, &nparity);
 
@@ -490,9 +475,8 @@ static int at91sam9_write_page(struct nand_device *nand, uint32_t page,
 
 	retval = nand_write_data_page(nand, oob_data, oob_size);
 
-	if (!oob) {
+	if (!oob)
 		free(oob_data);
-	}
 
 	if (ERROR_OK != retval) {
 		LOG_ERROR("Unable to write OOB data to NAND");
@@ -594,9 +578,8 @@ COMMAND_HANDLER(handle_at91sam9_ale_command)
 	struct at91sam9_nand *info = NULL;
 	unsigned num, address_line;
 
-	if (CMD_ARGC != 2) {
+	if (CMD_ARGC != 2)
 		return ERROR_COMMAND_SYNTAX_ERROR;
-	}
 
 	COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
 	nand = get_nand_device_by_num(num);
@@ -623,9 +606,8 @@ COMMAND_HANDLER(handle_at91sam9_rdy_busy_command)
 	struct at91sam9_nand *info = NULL;
 	unsigned num, base_pioc, pin_num;
 
-	if (CMD_ARGC != 3) {
+	if (CMD_ARGC != 3)
 		return ERROR_COMMAND_SYNTAX_ERROR;
-	}
 
 	COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
 	nand = get_nand_device_by_num(num);
@@ -655,9 +637,8 @@ COMMAND_HANDLER(handle_at91sam9_ce_command)
 	struct at91sam9_nand *info = NULL;
 	unsigned num, base_pioc, pin_num;
 
-	if (CMD_ARGC != 3) {
+	if (CMD_ARGC != 3)
 		return ERROR_COMMAND_SYNTAX_ERROR;
-	}
 
 	COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], num);
 	nand = get_nand_device_by_num(num);
diff --git a/src/flash/nand/core.c b/src/flash/nand/core.c
index 777b2fdc..d1a77631 100644
--- a/src/flash/nand/core.c
+++ b/src/flash/nand/core.c
@@ -20,6 +20,7 @@
  *   Free Software Foundation, Inc.,                                       *
  *   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.             *
  ***************************************************************************/
+
 #ifdef HAVE_CONFIG_H
 #include "config.h"
 #endif
@@ -27,13 +28,14 @@
 #include "imp.h"
 
 /* configured NAND devices and NAND Flash command handler */
-struct nand_device *nand_devices = NULL;
+struct nand_device *nand_devices;
 
 void nand_device_add(struct nand_device *c)
 {
 	if (nand_devices) {
 		struct nand_device *p = nand_devices;
-		while (p && p->next) p = p->next;
+		while (p && p->next)
+			p = p->next;
 		p->next = c;
 	} else
 		nand_devices = c;
@@ -50,94 +52,94 @@ void nand_device_add(struct nand_device *c)
  *	256	256 Byte page size
  *	512	512 Byte page size
  */
-static struct nand_info nand_flash_ids[] =
-{
+static struct nand_info nand_flash_ids[] = {
 	/* Vendor Specific Entries */
-	{ NAND_MFR_SAMSUNG,	0xD5, 8192, 2048, 0x100000, LP_OPTIONS, "K9GAG08 2GB NAND 3.3V x8 MLC 2b/cell"},
-	{ NAND_MFR_SAMSUNG,	0xD7, 8192, 4096, 0x100000, LP_OPTIONS, "K9LBG08 4GB NAND 3.3V x8 MLC 2b/cell"},
+	{ NAND_MFR_SAMSUNG,     0xD5, 8192, 2048, 0x100000, LP_OPTIONS,
+	  "K9GAG08 2GB NAND 3.3V x8 MLC 2b/cell"},
+	{ NAND_MFR_SAMSUNG,     0xD7, 8192, 4096, 0x100000, LP_OPTIONS,
+	  "K9LBG08 4GB NAND 3.3V x8 MLC 2b/cell"},
 
 	/* start "museum" IDs */
-	{ 0x0,			0x6e, 256, 1, 0x1000, 0,	 	"NAND 1MiB 5V 8-bit"},
-	{ 0x0,			0x64, 256, 2, 0x1000, 0,		"NAND 2MiB 5V 8-bit"},
-	{ 0x0,			0x6b, 512, 4, 0x2000, 0,		"NAND 4MiB 5V 8-bit"},
-	{ 0x0,			0xe8, 256, 1, 0x1000, 0,		"NAND 1MiB 3.3V 8-bit"},
-	{ 0x0,			0xec, 256, 1, 0x1000, 0,		"NAND 1MiB 3.3V 8-bit"},
-	{ 0x0,			0xea, 256, 2, 0x1000, 0,		"NAND 2MiB 3.3V 8-bit"},
-	{ 0x0,			0xd5, 512, 4, 0x2000, 0,		"NAND 4MiB 3.3V 8-bit"},
-	{ 0x0,			0xe3, 512, 4, 0x2000, 0,		"NAND 4MiB 3.3V 8-bit"},
-	{ 0x0,			0xe5, 512, 4, 0x2000, 0,		"NAND 4MiB 3.3V 8-bit"},
-	{ 0x0,			0xd6, 512, 8, 0x2000, 0,		"NAND 8MiB 3.3V 8-bit"},
-
-	{ 0x0,			0x39, 512, 8, 0x2000, 0, 		"NAND 8MiB 1.8V 8-bit"},
-	{ 0x0,			0xe6, 512, 8, 0x2000, 0, 		"NAND 8MiB 3.3V 8-bit"},
-	{ 0x0,			0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16, "NAND 8MiB 1.8V 16-bit"},
-	{ 0x0,			0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16, "NAND 8MiB 3.3V 16-bit"},
+	{ 0x0,                  0x6e, 256, 1, 0x1000, 0,                "NAND 1MiB 5V 8-bit"},
+	{ 0x0,                  0x64, 256, 2, 0x1000, 0,                "NAND 2MiB 5V 8-bit"},
+	{ 0x0,                  0x6b, 512, 4, 0x2000, 0,                "NAND 4MiB 5V 8-bit"},
+	{ 0x0,                  0xe8, 256, 1, 0x1000, 0,                "NAND 1MiB 3.3V 8-bit"},
+	{ 0x0,                  0xec, 256, 1, 0x1000, 0,                "NAND 1MiB 3.3V 8-bit"},
+	{ 0x0,                  0xea, 256, 2, 0x1000, 0,                "NAND 2MiB 3.3V 8-bit"},
+	{ 0x0,                  0xd5, 512, 4, 0x2000, 0,                "NAND 4MiB 3.3V 8-bit"},
+	{ 0x0,                  0xe3, 512, 4, 0x2000, 0,                "NAND 4MiB 3.3V 8-bit"},
+	{ 0x0,                  0xe5, 512, 4, 0x2000, 0,                "NAND 4MiB 3.3V 8-bit"},
+	{ 0x0,                  0xd6, 512, 8, 0x2000, 0,                "NAND 8MiB 3.3V 8-bit"},
+
+	{ 0x0,                  0x39, 512, 8, 0x2000, 0,                "NAND 8MiB 1.8V 8-bit"},
+	{ 0x0,                  0xe6, 512, 8, 0x2000, 0,                "NAND 8MiB 3.3V 8-bit"},
+	{ 0x0,                  0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16, "NAND 8MiB 1.8V 16-bit"},
+	{ 0x0,                  0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16, "NAND 8MiB 3.3V 16-bit"},
 	/* end "museum" IDs */
 
-	{ 0x0,			0x33, 512, 16, 0x4000, 0, 		"NAND 16MiB 1.8V 8-bit"},
-	{ 0x0,			0x73, 512, 16, 0x4000, 0, 		"NAND 16MiB 3.3V 8-bit"},
-	{ 0x0,			0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16,"NAND 16MiB 1.8V 16-bit"},
-	{ 0x0,			0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16,"NAND 16MiB 3.3V 16-bit"},
-
-	{ 0x0,			0x35, 512, 32, 0x4000, 0, 		"NAND 32MiB 1.8V 8-bit"},
-	{ 0x0,			0x75, 512, 32, 0x4000, 0, 		"NAND 32MiB 3.3V 8-bit"},
-	{ 0x0,			0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16,"NAND 32MiB 1.8V 16-bit"},
-	{ 0x0,			0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16,"NAND 32MiB 3.3V 16-bit"},
-
-	{ 0x0,			0x36, 512, 64, 0x4000, 0, 		"NAND 64MiB 1.8V 8-bit"},
-	{ 0x0,			0x76, 512, 64, 0x4000, 0, 		"NAND 64MiB 3.3V 8-bit"},
-	{ 0x0,			0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16,"NAND 64MiB 1.8V 16-bit"},
-	{ 0x0,			0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16,"NAND 64MiB 3.3V 16-bit"},
-
-	{ 0x0,			0x78, 512, 128, 0x4000, 0, 		"NAND 128MiB 1.8V 8-bit"},
-	{ 0x0,			0x39, 512, 128, 0x4000, 0, 		"NAND 128MiB 1.8V 8-bit"},
-	{ 0x0,			0x79, 512, 128, 0x4000, 0, 		"NAND 128MiB 3.3V 8-bit"},
-	{ 0x0,			0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16,"NAND 128MiB 1.8V 16-bit"},
-	{ 0x0,			0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16,"NAND 128MiB 1.8V 16-bit"},
-	{ 0x0,			0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16,"NAND 128MiB 3.3V 16-bit"},
-	{ 0x0,			0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16,"NAND 128MiB 3.3V 16-bit"},
-
-	{ 0x0,			0x71, 512, 256, 0x4000, 0, 		"NAND 256MiB 3.3V 8-bit"},
-
-	{ 0x0,			0xA2, 0,  64, 0, LP_OPTIONS,		"NAND 64MiB 1.8V 8-bit"},
-	{ 0x0,			0xF2, 0,  64, 0, LP_OPTIONS,		"NAND 64MiB 3.3V 8-bit"},
-	{ 0x0,			0xB2, 0,  64, 0, LP_OPTIONS16,		"NAND 64MiB 1.8V 16-bit"},
-	{ 0x0,			0xC2, 0,  64, 0, LP_OPTIONS16,		"NAND 64MiB 3.3V 16-bit"},
-
-	{ 0x0,			0xA1, 0, 128, 0, LP_OPTIONS,		"NAND 128MiB 1.8V 8-bit"},
-	{ 0x0,			0xF1, 0, 128, 0, LP_OPTIONS,		"NAND 128MiB 3.3V 8-bit"},
-	{ 0x0,			0xB1, 0, 128, 0, LP_OPTIONS16,		"NAND 128MiB 1.8V 16-bit"},
-	{ 0x0,			0xC1, 0, 128, 0, LP_OPTIONS16,		"NAND 128MiB 3.3V 16-bit"},
-
-	{ 0x0,			0xAA, 0, 256, 0, LP_OPTIONS,		"NAND 256MiB 1.8V 8-bit"},
-	{ 0x0,			0xDA, 0, 256, 0, LP_OPTIONS,		"NAND 256MiB 3.3V 8-bit"},
-	{ 0x0,			0xBA, 0, 256, 0, LP_OPTIONS16,		"NAND 256MiB 1.8V 16-bit"},
-	{ 0x0,			0xCA, 0, 256, 0, LP_OPTIONS16,		"NAND 256MiB 3.3V 16-bit"},
-
-	{ 0x0,			0xAC, 0, 512, 0, LP_OPTIONS,		"NAND 512MiB 1.8V 8-bit"},
-	{ 0x0,			0xDC, 0, 512, 0, LP_OPTIONS,		"NAND 512MiB 3.3V 8-bit"},
-	{ 0x0,			0xBC, 0, 512, 0, LP_OPTIONS16,		"NAND 512MiB 1.8V 16-bit"},
-	{ 0x0,			0xCC, 0, 512, 0, LP_OPTIONS16,		"NAND 512MiB 3.3V 16-bit"},
-
-	{ 0x0,			0xA3, 0, 1024, 0, LP_OPTIONS,		"NAND 1GiB 1.8V 8-bit"},
-	{ 0x0,			0xD3, 0, 1024, 0, LP_OPTIONS,		"NAND 1GiB 3.3V 8-bit"},
-	{ 0x0,			0xB3, 0, 1024, 0, LP_OPTIONS16,		"NAND 1GiB 1.8V 16-bit"},
-	{ 0x0,			0xC3, 0, 1024, 0, LP_OPTIONS16,		"NAND 1GiB 3.3V 16-bit"},
-
-	{ 0x0,			0xA5, 0, 2048, 0, LP_OPTIONS,		"NAND 2GiB 1.8V 8-bit"},
-	{ 0x0,			0xD5, 0, 8192, 0, LP_OPTIONS,		"NAND 2GiB 3.3V 8-bit"},
-	{ 0x0,			0xB5, 0, 2048, 0, LP_OPTIONS16,		"NAND 2GiB 1.8V 16-bit"},
-	{ 0x0,			0xC5, 0, 2048, 0, LP_OPTIONS16,		"NAND 2GiB 3.3V 16-bit"},
-
-	{ 0x0,			0x48, 0, 2048, 0, LP_OPTIONS,		"NAND 2GiB 3.3V 8-bit"},
+	{ 0x0,                  0x33, 512, 16, 0x4000, 0,               "NAND 16MiB 1.8V 8-bit"},
+	{ 0x0,                  0x73, 512, 16, 0x4000, 0,               "NAND 16MiB 3.3V 8-bit"},
+	{ 0x0,                  0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16, "NAND 16MiB 1.8V 16-bit"},
+	{ 0x0,                  0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16, "NAND 16MiB 3.3V 16-bit"},
+
+	{ 0x0,                  0x35, 512, 32, 0x4000, 0,               "NAND 32MiB 1.8V 8-bit"},
+	{ 0x0,                  0x75, 512, 32, 0x4000, 0,               "NAND 32MiB 3.3V 8-bit"},
+	{ 0x0,                  0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16, "NAND 32MiB 1.8V 16-bit"},
+	{ 0x0,                  0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16, "NAND 32MiB 3.3V 16-bit"},
+
+	{ 0x0,                  0x36, 512, 64, 0x4000, 0,               "NAND 64MiB 1.8V 8-bit"},
+	{ 0x0,                  0x76, 512, 64, 0x4000, 0,               "NAND 64MiB 3.3V 8-bit"},
+	{ 0x0,                  0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16, "NAND 64MiB 1.8V 16-bit"},
+	{ 0x0,                  0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16, "NAND 64MiB 3.3V 16-bit"},
+
+	{ 0x0,                  0x78, 512, 128, 0x4000, 0,              "NAND 128MiB 1.8V 8-bit"},
+	{ 0x0,                  0x39, 512, 128, 0x4000, 0,              "NAND 128MiB 1.8V 8-bit"},
+	{ 0x0,                  0x79, 512, 128, 0x4000, 0,              "NAND 128MiB 3.3V 8-bit"},
+	{ 0x0,                  0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16, "NAND 128MiB 1.8V 16-bit"},
+	{ 0x0,                  0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16, "NAND 128MiB 1.8V 16-bit"},
+	{ 0x0,                  0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16, "NAND 128MiB 3.3V 16-bit"},
+	{ 0x0,                  0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16, "NAND 128MiB 3.3V 16-bit"},
+
+	{ 0x0,                  0x71, 512, 256, 0x4000, 0,              "NAND 256MiB 3.3V 8-bit"},
+
+	{ 0x0,                  0xA2, 0,  64, 0, LP_OPTIONS,            "NAND 64MiB 1.8V 8-bit"},
+	{ 0x0,                  0xF2, 0,  64, 0, LP_OPTIONS,            "NAND 64MiB 3.3V 8-bit"},
+	{ 0x0,                  0xB2, 0,  64, 0, LP_OPTIONS16,          "NAND 64MiB 1.8V 16-bit"},
+	{ 0x0,                  0xC2, 0,  64, 0, LP_OPTIONS16,          "NAND 64MiB 3.3V 16-bit"},
+
+	{ 0x0,                  0xA1, 0, 128, 0, LP_OPTIONS,            "NAND 128MiB 1.8V 8-bit"},
+	{ 0x0,                  0xF1, 0, 128, 0, LP_OPTIONS,            "NAND 128MiB 3.3V 8-bit"},
+	{ 0x0,                  0xB1, 0, 128, 0, LP_OPTIONS16,          "NAND 128MiB 1.8V 16-bit"},
+	{ 0x0,                  0xC1, 0, 128, 0, LP_OPTIONS16,          "NAND 128MiB 3.3V 16-bit"},
+
+	{ 0x0,                  0xAA, 0, 256, 0, LP_OPTIONS,            "NAND 256MiB 1.8V 8-bit"},
+	{ 0x0,                  0xDA, 0, 256, 0, LP_OPTIONS,            "NAND 256MiB 3.3V 8-bit"},
+	{ 0x0,                  0xBA, 0, 256, 0, LP_OPTIONS16,          "NAND 256MiB 1.8V 16-bit"},
+	{ 0x0,                  0xCA, 0, 256, 0, LP_OPTIONS16,          "NAND 256MiB 3.3V 16-bit"},
+
+	{ 0x0,                  0xAC, 0, 512, 0, LP_OPTIONS,            "NAND 512MiB 1.8V 8-bit"},
+	{ 0x0,                  0xDC, 0, 512, 0, LP_OPTIONS,            "NAND 512MiB 3.3V 8-bit"},
+	{ 0x0,                  0xBC, 0, 512, 0, LP_OPTIONS16,          "NAND 512MiB 1.8V 16-bit"},
+	{ 0x0,                  0xCC, 0, 512, 0, LP_OPTIONS16,          "NAND 512MiB 3.3V 16-bit"},
+
+	{ 0x0,                  0xA3, 0, 1024, 0, LP_OPTIONS,           "NAND 1GiB 1.8V 8-bit"},
+	{ 0x0,                  0xD3, 0, 1024, 0, LP_OPTIONS,           "NAND 1GiB 3.3V 8-bit"},
+	{ 0x0,                  0xB3, 0, 1024, 0, LP_OPTIONS16,         "NAND 1GiB 1.8V 16-bit"},
+	{ 0x0,                  0xC3, 0, 1024, 0, LP_OPTIONS16,         "NAND 1GiB 3.3V 16-bit"},
+
+	{ 0x0,                  0xA5, 0, 2048, 0, LP_OPTIONS,           "NAND 2GiB 1.8V 8-bit"},
+	{ 0x0,                  0xD5, 0, 8192, 0, LP_OPTIONS,           "NAND 2GiB 3.3V 8-bit"},
+	{ 0x0,                  0xB5, 0, 2048, 0, LP_OPTIONS16,         "NAND 2GiB 1.8V 16-bit"},
+	{ 0x0,                  0xC5, 0, 2048, 0, LP_OPTIONS16,         "NAND 2GiB 3.3V 16-bit"},
+
+	{ 0x0,                  0x48, 0, 2048, 0, LP_OPTIONS,           "NAND 2GiB 3.3V 8-bit"},
 
 	{0, 0, 0, 0, 0, 0, NULL}
 };
 
 /* Manufacturer ID list
  */
-static struct nand_manufacturer nand_manuf_ids[] =
-{
+static struct nand_manufacturer nand_manuf_ids[] = {
 	{0x0, "unknown"},
 	{NAND_MFR_TOSHIBA, "Toshiba"},
 	{NAND_MFR_SAMSUNG, "Samsung"},
@@ -162,7 +164,8 @@ static struct nand_ecclayout nand_oob_8 = {
 		{.offset = 3,
 		 .length = 2},
 		{.offset = 6,
-		 .length = 2}}
+		 .length = 2}
+	}
 };
 #endif
 
@@ -179,8 +182,7 @@ static struct nand_device *get_nand_device_by_name(const char *name)
 	unsigned found = 0;
 
 	struct nand_device *nand;
-	for (nand = nand_devices; NULL != nand; nand = nand->next)
-	{
+	for (nand = nand_devices; NULL != nand; nand = nand->next) {
 		if (strcmp(nand->name, name) == 0)
 			return nand;
 		if (!flash_driver_name_matches(nand->controller->name, name))
@@ -197,19 +199,16 @@ struct nand_device *get_nand_device_by_num(int num)
 	struct nand_device *p;
 	int i = 0;
 
-	for (p = nand_devices; p; p = p->next)
-	{
+	for (p = nand_devices; p; p = p->next) {
 		if (i++ == num)
-		{
 			return p;
-		}
 	}
 
 	return NULL;
 }
 
 COMMAND_HELPER(nand_command_get_device, unsigned name_index,
-		struct nand_device **nand)
+	struct nand_device **nand)
 {
 	const char *str = CMD_ARGV[name_index];
 	*nand = get_nand_device_by_name(str);
@@ -241,23 +240,18 @@ int nand_build_bbt(struct nand_device *nand, int first, int last)
 		last = nand->num_blocks - 1;
 
 	page = first * pages_per_block;
-	for (i = first; i <= last; i++)
-	{
+	for (i = first; i <= last; i++) {
 		ret = nand_read_page(nand, page, NULL, 0, oob, 6);
 		if (ret != ERROR_OK)
 			return ret;
 
 		if (((nand->device->options & NAND_BUSWIDTH_16) && ((oob[0] & oob[1]) != 0xff))
-			|| (((nand->page_size == 512) && (oob[5] != 0xff)) ||
-				((nand->page_size == 2048) && (oob[0] != 0xff))))
-		{
+				|| (((nand->page_size == 512) && (oob[5] != 0xff)) ||
+				((nand->page_size == 2048) && (oob[0] != 0xff)))) {
 			LOG_WARNING("bad block: %i", i);
 			nand->blocks[i].is_bad = 1;
-		}
-		else
-		{
+		} else
 			nand->blocks[i].is_bad = 0;
-		}
 
 		page += pages_per_block;
 	}
@@ -276,16 +270,12 @@ int nand_read_status(struct nand_device *nand, uint8_t *status)
 	alive_sleep(1);
 
 	/* read status */
-	if (nand->device->options & NAND_BUSWIDTH_16)
-	{
+	if (nand->device->options & NAND_BUSWIDTH_16) {
 		uint16_t data;
 		nand->controller->read_data(nand, &data);
 		*status = data & 0xff;
-	}
-	else
-	{
+	} else
 		nand->controller->read_data(nand, status);
-	}
 
 	return ERROR_OK;
 }
@@ -300,9 +290,8 @@ static int nand_poll_ready(struct nand_device *nand, int timeout)
 			uint16_t data;
 			nand->controller->read_data(nand, &data);
 			status = data & 0xff;
-		} else {
+		} else
 			nand->controller->read_data(nand, &status);
-		}
 		if (status & NAND_STATUS_READY)
 			break;
 		alive_sleep(1);
@@ -329,15 +318,15 @@ int nand_probe(struct nand_device *nand)
 	nand->erase_size = 0;
 
 	/* initialize controller (device parameters are zero, use controller default) */
-	if ((retval = nand->controller->init(nand) != ERROR_OK))
-	{
-		switch (retval)
-		{
+	retval = nand->controller->init(nand);
+	if (retval != ERROR_OK) {
+		switch (retval) {
 			case ERROR_NAND_OPERATION_FAILED:
 				LOG_DEBUG("controller initialization failed");
 				return ERROR_NAND_OPERATION_FAILED;
 			case ERROR_NAND_OPERATION_NOT_SUPPORTED:
-				LOG_ERROR("BUG: controller reported that it doesn't support default parameters");
+				LOG_ERROR(
+				"BUG: controller reported that it doesn't support default parameters");
 				return ERROR_NAND_OPERATION_FAILED;
 			default:
 				LOG_ERROR("BUG: unknown controller initialization failure");
@@ -351,13 +340,10 @@ int nand_probe(struct nand_device *nand)
 	nand->controller->command(nand, NAND_CMD_READID);
 	nand->controller->address(nand, 0x0);
 
-	if (nand->bus_width == 8)
-	{
+	if (nand->bus_