diff options
| author | Matthias Welwarsky <matthias@welwarsky.de> | 2015-10-16 10:46:35 +0200 |
|---|---|---|
| committer | Paul Fertser <fercerpav@gmail.com> | 2015-11-30 05:42:13 +0000 |
| commit | f3716894c6c2ab0e16bdb073d79e4df855897c10 (patch) | |
| tree | 1637dd202c78e21df948f02e9caf122feabf14b4 | |
| parent | d17c11759fa0b183dd9a9837534e9d6849a8db14 (diff) | |
armv7a: fix debug messages regarding cache on/off state
Cache bits are not level specific, remove "l1" from debug message.
Also, fix data/instruction mixup in armv7a_l1_i_cache_sanity_check()
Change-Id: I259665ffe62c7ada5b4f98d3fd907e93662d4091
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3028
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins
| -rw-r--r-- | src/target/armv7a_cache.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/target/armv7a_cache.c b/src/target/armv7a_cache.c index da617b81..89e85025 100644 --- a/src/target/armv7a_cache.c +++ b/src/target/armv7a_cache.c @@ -35,7 +35,7 @@ static int armv7a_l1_d_cache_sanity_check(struct target *target) /* check that cache data is on at target halt */ if (!armv7a->armv7a_mmu.armv7a_cache.d_u_cache_enabled) { - LOG_DEBUG("l1 data cache is not enabled"); + LOG_DEBUG("data cache is not enabled"); return ERROR_TARGET_INVALID; } @@ -53,7 +53,7 @@ static int armv7a_l1_i_cache_sanity_check(struct target *target) /* check that cache data is on at target halt */ if (!armv7a->armv7a_mmu.armv7a_cache.i_cache_enabled) { - LOG_DEBUG("l1 data cache is not enabled"); + LOG_DEBUG("instruction cache is not enabled"); return ERROR_TARGET_INVALID; } |