diff options
| author | Oleksij Rempel <linux@rempel-privat.de> | 2014-01-22 12:27:19 +0100 |
|---|---|---|
| committer | Spencer Oliver <spen@spen-soft.co.uk> | 2014-08-19 20:18:09 +0000 |
| commit | ecb6f8c23e381dde811c94c9bda66f69c8a79825 (patch) | |
| tree | 145f5f2e56306e01a0503db85c19d493f017402c | |
| parent | 02ac60b0000977c707011abeac49c58de78bb9e5 (diff) | |
mips_m4k.c: D or I breaks only if they supported.
For example Realtek RTL8186 (Lexra LX5280 core) don't
support break- and watchpoints.
Change-Id: Ie00102da4bf13a8c42a9ad05910c66884f297cfd
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/1933
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
| -rw-r--r-- | src/target/mips_m4k.c | 46 |
1 files changed, 25 insertions, 21 deletions
diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c index d7e42652..4774c49c 100644 --- a/src/target/mips_m4k.c +++ b/src/target/mips_m4k.c @@ -57,33 +57,37 @@ static int mips_m4k_examine_debug_reason(struct target *target) int retval; if ((target->debug_reason != DBG_REASON_DBGRQ) - && (target->debug_reason != DBG_REASON_SINGLESTEP)) { - /* get info about inst breakpoint support */ - retval = target_read_u32(target, - ejtag_info->ejtag_ibs_addr, &break_status); - if (retval != ERROR_OK) - return retval; - if (break_status & 0x1f) { - /* we have halted on a breakpoint */ - retval = target_write_u32(target, - ejtag_info->ejtag_ibs_addr, 0); + && (target->debug_reason != DBG_REASON_SINGLESTEP)) { + if (ejtag_info->debug_caps & EJTAG_DCR_IB) { + /* get info about inst breakpoint support */ + retval = target_read_u32(target, + ejtag_info->ejtag_ibs_addr, &break_status); if (retval != ERROR_OK) return retval; - target->debug_reason = DBG_REASON_BREAKPOINT; + if (break_status & 0x1f) { + /* we have halted on a breakpoint */ + retval = target_write_u32(target, + ejtag_info->ejtag_ibs_addr, 0); + if (retval != ERROR_OK) + return retval; + target->debug_reason = DBG_REASON_BREAKPOINT; + } } - /* get info about data breakpoint support */ - retval = target_read_u32(target, - ejtag_info->ejtag_dbs_addr, &break_status); - if (retval != ERROR_OK) - return retval; - if (break_status & 0x1f) { - /* we have halted on a breakpoint */ - retval = target_write_u32(target, - ejtag_info->ejtag_dbs_addr, 0); + if (ejtag_info->debug_caps & EJTAG_DCR_DB) { + /* get info about data breakpoint support */ + retval = target_read_u32(target, + ejtag_info->ejtag_dbs_addr, &break_status); if (retval != ERROR_OK) return retval; - target->debug_reason = DBG_REASON_WATCHPOINT; + if (break_status & 0x1f) { + /* we have halted on a breakpoint */ + retval = target_write_u32(target, + ejtag_info->ejtag_dbs_addr, 0); + if (retval != ERROR_OK) + return retval; + target->debug_reason = DBG_REASON_WATCHPOINT; + } } } |