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authorMarek Vasut <marek.vasut@gmail.com>2020-01-15 05:42:03 +0100
committerOleksij Rempel <linux@rempel-privat.de>2020-03-09 05:59:39 +0000
commitb304971f380d89d5e934859b2c36e81c26df6eee (patch)
tree0b7325bb087e18a359106f4a6a41637f644fdf3e
parent82a5c55dc357b042b6755b343c920baebd410874 (diff)
tcl/target: Unify Renesas R-Car JTAG reset config
Both Gen2 and Gen3 used the same init_reset{} implementation, pull it into common file and include it from both generations. Moreover, this behavior is SoC specific, not board specific, so move the common init_reset into target/ directory. Change-Id: I5489a4bff9a786da8cb7fd7a515b0c9ce9dc16e3 Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Reviewed-on: http://openocd.zylin.com/5400 Tested-by: jenkins Reviewed-by: Oleksij Rempel <linux@rempel-privat.de>
-rw-r--r--tcl/board/renesas_salvator-xs.cfg14
-rw-r--r--tcl/target/renesas_rcar_gen2.cfg2
-rw-r--r--tcl/target/renesas_rcar_gen3.cfg2
-rw-r--r--tcl/target/renesas_rcar_reset_common.cfg (renamed from tcl/board/renesas_gen2_common.cfg)0
4 files changed, 4 insertions, 14 deletions
diff --git a/tcl/board/renesas_salvator-xs.cfg b/tcl/board/renesas_salvator-xs.cfg
index e6f4da33..6d3096ec 100644
--- a/tcl/board/renesas_salvator-xs.cfg
+++ b/tcl/board/renesas_salvator-xs.cfg
@@ -7,17 +7,3 @@ if { ![info exists SOC] } {
set SOC H3
}
source [find target/renesas_rcar_gen3.cfg]
-
-reset_config trst_and_srst srst_nogate
-
-proc init_reset {mode} {
- # Assert both resets: equivalent to a power-on reset
- adapter assert trst assert srst
-
- # Deassert TRST to begin TAP communication
- adapter deassert trst assert srst
-
- # TAP should now be responsive, validate the scan-chain
- jtag arp_init
-}
-
diff --git a/tcl/target/renesas_rcar_gen2.cfg b/tcl/target/renesas_rcar_gen2.cfg
index 9f7421d9..91baa6c9 100644
--- a/tcl/target/renesas_rcar_gen2.cfg
+++ b/tcl/target/renesas_rcar_gen2.cfg
@@ -120,4 +120,6 @@ if { [string equal $_boot_core CA15] } {
setup_ca a7 $CA7_DBGBASE $_num_ca7 0
}
+source [find target/renesas_rcar_reset_common.cfg]
+
eval "target smp $smp_targets"
diff --git a/tcl/target/renesas_rcar_gen3.cfg b/tcl/target/renesas_rcar_gen3.cfg
index 34c19182..72f185d6 100644
--- a/tcl/target/renesas_rcar_gen3.cfg
+++ b/tcl/target/renesas_rcar_gen3.cfg
@@ -166,4 +166,6 @@ if { [string equal $_boot_core CA57] } {
setup_a5x a53 $CA53_DBGBASE $CA53_CTIBASE $_num_ca53 0
}
+source [find target/renesas_rcar_reset_common.cfg]
+
eval "target smp $smp_targets"
diff --git a/tcl/board/renesas_gen2_common.cfg b/tcl/target/renesas_rcar_reset_common.cfg
index 3e4579b9..3e4579b9 100644
--- a/tcl/board/renesas_gen2_common.cfg
+++ b/tcl/target/renesas_rcar_reset_common.cfg