diff options
| author | David Ung <davidu@nvidia.com> | 2015-04-03 16:55:59 -0700 |
|---|---|---|
| committer | Matthias Welwarsky <matthias.welwarsky@sysgo.com> | 2017-02-10 13:52:52 +0100 |
| commit | 9cbfc9feb35ce0fcc9bb67a4d83b02100ee65f88 (patch) | |
| tree | 67036850ee302fb9ffa924a5e3e4b25d0d8376ff | |
| parent | ea45db5c8a3f4329e870d695cb571251b5aa3102 (diff) | |
arm_dpm: Add new state ARM_STATE_AARCH64
Add new enum ARM_STATE_AARCH64 to the list of possible states.
Change-Id: I3cb2df70f8d5803a63d8374bf3eb75de988e24f8
Signed-off-by: David Ung <david.ung.42@gmail.com>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
| -rw-r--r-- | src/target/arm.h | 1 | ||||
| -rw-r--r-- | src/target/arm_dpm.c | 4 | ||||
| -rw-r--r-- | src/target/cortex_a.c | 3 |
3 files changed, 8 insertions, 0 deletions
diff --git a/src/target/arm.h b/src/target/arm.h index 77a2f7b0..5713fc08 100644 --- a/src/target/arm.h +++ b/src/target/arm.h @@ -78,6 +78,7 @@ enum arm_state { ARM_STATE_THUMB, ARM_STATE_JAZELLE, ARM_STATE_THUMB_EE, + ARM_STATE_AARCH64, }; #define ARM_COMMON_MAGIC 0x0A450A45 diff --git a/src/target/arm_dpm.c b/src/target/arm_dpm.c index 62c61755..3b18719a 100644 --- a/src/target/arm_dpm.c +++ b/src/target/arm_dpm.c @@ -165,6 +165,9 @@ static int dpm_read_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum) /* core-specific ... ? */ LOG_WARNING("Jazelle PC adjustment unknown"); break; + case ARM_STATE_AARCH64: + LOG_ERROR("AARCH64: 32bit read requested"); + break; } break; default: @@ -905,6 +908,7 @@ void arm_dpm_report_wfar(struct arm_dpm *dpm, uint32_t addr) addr -= 4; break; case ARM_STATE_JAZELLE: + case ARM_STATE_AARCH64: /* ?? */ break; } diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c index 62ac361e..1cf66560 100644 --- a/src/target/cortex_a.c +++ b/src/target/cortex_a.c @@ -992,6 +992,9 @@ static int cortex_a_internal_restore(struct target *target, int current, case ARM_STATE_JAZELLE: LOG_ERROR("How do I resume into Jazelle state??"); return ERROR_FAIL; + case ARM_STATE_AARCH64: + LOG_ERROR("Shoudn't be in AARCH64 state"); + return ERROR_FAIL; } LOG_DEBUG("resume pc = 0x%08" PRIx32, resume_pc); buf_set_u32(arm->pc->value, 0, 32, resume_pc); |