diff options
author | Tim Sander <tim@krieglstein.org> | 2014-03-31 21:21:44 +0100 |
---|---|---|
committer | Paul Fertser <fercerpav@gmail.com> | 2014-04-14 18:15:57 +0000 |
commit | 4835a21dea7551fa24008a627dba107e9739eaab (patch) | |
tree | 8925dfb5433e2c41146e5e59bd6a214edb7e210b | |
parent | 47830f0ebf8135758b372d2a84eb370bf03f901d (diff) |
target: fix incorrect arm cpu monitor mode encoding
According to the "Arm Arch Ref Manual ARMv7-a and ARMv7-R edition" the
CPSR encoding for Monitor mode is 0b10110 (22) not 0b11010 (26) as is
currently used.
Change-Id: I73373a0029a81abc92febf518b88bf0dd4dec1fa
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/2081
Reviewed-by: Jörg Wunsch <openocd@uriah.heep.sax.de>
Tested-by: jenkins
Reviewed-by: Younes REGAIEG <y.regaieg@gmail.com>
Reviewed-by: Tim Sander <tim@krieglstein.org>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
-rw-r--r-- | src/target/arm.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/target/arm.h b/src/target/arm.h index c7c8dc0f..88b5902e 100644 --- a/src/target/arm.h +++ b/src/target/arm.h @@ -58,8 +58,8 @@ enum arm_mode { ARM_MODE_FIQ = 17, ARM_MODE_IRQ = 18, ARM_MODE_SVC = 19, + ARM_MODE_MON = 22, ARM_MODE_ABT = 23, - ARM_MODE_MON = 26, ARM_MODE_UND = 27, ARM_MODE_SYS = 31, |