diff options
| author | Slowcoder <slowcoder@gmail.com> | 2017-08-31 22:34:16 +0200 |
|---|---|---|
| committer | Spencer Oliver <spen@spen-soft.co.uk> | 2017-10-03 11:28:20 +0100 |
| commit | 2168c475ff7ca0f2914bee39700952600014ac40 (patch) | |
| tree | fb8133852ca773c35ba66b0f3b1af335037e542e | |
| parent | d43308af7513fa98f6ef1cae75393c8766bd370d (diff) | |
nrf5: Add nRF52832-QFAA support
Change-Id: Ica9e34e873cac182662b1e32a9b3164dbc0c935f
Signed-off-by: Slowcoder <slowcoder@gmail.com>
Reviewed-on: http://openocd.zylin.com/4210
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
| -rw-r--r-- | src/flash/nor/nrf5.c | 3 | ||||
| -rw-r--r-- | tcl/target/nrf52.cfg | 15 |
2 files changed, 17 insertions, 1 deletions
diff --git a/src/flash/nor/nrf5.c b/src/flash/nor/nrf5.c index 8441c2a0..11e57291 100644 --- a/src/flash/nor/nrf5.c +++ b/src/flash/nor/nrf5.c @@ -195,6 +195,9 @@ static const struct nrf5_device_spec nrf5_known_devices_table[] = { NRF5_DEVICE_DEF(0x007A, "51422", "CEAA", "C0", 256), NRF5_DEVICE_DEF(0x0088, "51422", "CFAC", "A0", 256), + /* nRF52832 Devices */ + NRF5_DEVICE_DEF(0x00C7, "52832", "QFAA", "B0", 512), + /* Some early nRF51-DK (PCA10028) & nRF51-Dongle (PCA10031) boards with built-in jlink seem to use engineering samples not listed in the nRF51 Series Compatibility Matrix V1.0. */ diff --git a/tcl/target/nrf52.cfg b/tcl/target/nrf52.cfg index c1cbf1a2..e7301750 100644 --- a/tcl/target/nrf52.cfg +++ b/tcl/target/nrf52.cfg @@ -10,6 +10,14 @@ if { [info exists CHIPNAME] } { set _CHIPNAME nrf52 } +# Work-area is a space in RAM used for flash programming +# By default use 16kB +if { [info exists WORKAREASIZE] } { + set _WORKAREASIZE $WORKAREASIZE +} else { + set _WORKAREASIZE 0x4000 +} + if { [info exists CPUTAPID] } { set _CPUTAPID $CPUTAPID } else { @@ -21,8 +29,13 @@ swj_newdap $_CHIPNAME cpu -expected-id $_CPUTAPID set _TARGETNAME $_CHIPNAME.cpu target create $_TARGETNAME cortex_m -chain-position $_TARGETNAME -adapter_khz 10000 +adapter_khz 1000 + +$_TARGETNAME configure -work-area-phys 0x20000000 -work-area-size $_WORKAREASIZE -work-area-backup 0 if { ![using_hla] } { cortex_m reset_config sysresetreq } + +flash bank $_CHIPNAME.flash nrf5 0x00000000 0 1 1 $_TARGETNAME +flash bank $_CHIPNAME.uicr nrf5 0x10001000 0 1 1 $_TARGETNAME |