armv4_5: Integrate build of erase check code

Add rules to build armv4_5_erase_check.inc, and convert the code to
target endianness the least intrusive way.

Drop an unused word from the assembler sources to make the ARM bytecode
fully match that of armv4_5.c and to not break ARMv4 assumptions.

This completes the build rules for contrib/loaders/erase_check directory.

Change-Id: I36be7a944e26142088195fa3fb072d4e577bf328
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3135
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

4 files changed, 21 insertions, 17 deletions

diff --git a/contrib/loaders/erase_check/Makefile b/contrib/loaders/erase_check/Makefile
index 32b75175..cd4d3221 100644
--- a/contrib/loaders/erase_check/Makefile
+++ b/contrib/loaders/erase_check/Makefile
@@ -4,7 +4,16 @@ ARM_CROSS_COMPILE ?= arm-none-eabi-
 ARM_AS      ?= $(ARM_CROSS_COMPILE)as
 ARM_OBJCOPY ?= $(ARM_CROSS_COMPILE)objcopy
 
-arm: armv7m_erase_check.inc armv7m_0_erase_check.inc
+arm: armv4_5_erase_check.inc armv7m_erase_check.inc armv7m_0_erase_check.inc
+
+armv4_5_%.elf: armv4_5_%.s
+	$(ARM_AS) $< -o $@
+
+armv4_5_%.bin: armv4_5_%.elf
+	$(ARM_OBJCOPY) -Obinary $< $@
+
+armv4_5_%.inc: armv4_5_%.bin
+	$(BIN2C) < $< > $@
 
 armv7m_%.elf: armv7m_%.s
 	$(ARM_AS) $< -o $@
diff --git a/contrib/loaders/erase_check/armv4_5_erase_check.inc b/contrib/loaders/erase_check/armv4_5_erase_check.inc
new file mode 100644
index 00000000..f7f8ddf1
--- /dev/null
+++ b/contrib/loaders/erase_check/armv4_5_erase_check.inc
@@ -0,0 +1,3 @@
+/* Autogenerated with ../../../src/helper/bin2char.sh */
+0x01,0x30,0xd0,0xe4,0x03,0x20,0x02,0xe0,0x01,0x10,0x51,0xe2,0xfb,0xff,0xff,0x1a,
+0x70,0x00,0x20,0xe1,
diff --git a/contrib/loaders/erase_check/armv4_5_erase_check.s b/contrib/loaders/erase_check/armv4_5_erase_check.s
index 6d075a91..6c7d27f0 100644
--- a/contrib/loaders/erase_check/armv4_5_erase_check.s
+++ b/contrib/loaders/erase_check/armv4_5_erase_check.s
@@ -36,6 +36,4 @@ loop:
 end:
 	bkpt	#0
 
-CRC32XOR:	.word	0x04c11db7
-
 	.end
diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c
index ba873b05..e6bfca68 100644
--- a/src/target/armv4_5.c
+++ b/src/target/armv4_5.c
@@ -1523,30 +1523,24 @@ int arm_blank_check_memory(struct target *target,
 	uint32_t i;
 	uint32_t exit_var = 0;
 
-	/* see contrib/loaders/erase_check/armv4_5_erase_check.s for src */
-
-	static const uint32_t check_code[] = {
-		/* loop: */
-		0xe4d03001,		/* ldrb r3, [r0], #1 */
-		0xe0022003,		/* and r2, r2, r3    */
-		0xe2511001,		/* subs r1, r1, #1   */
-		0x1afffffb,		/* bne loop          */
-		/* end: */
-		0xe1200070,		/* bkpt #0 */
+	static const uint8_t check_code_le[] = {
+#include "../../contrib/loaders/erase_check/armv4_5_erase_check.inc"
 	};
 
+	assert(sizeof(check_code_le) % 4 == 0);
+
 	/* make sure we have a working area */
 	retval = target_alloc_working_area(target,
-			sizeof(check_code), &check_algorithm);
+			sizeof(check_code_le), &check_algorithm);
 	if (retval != ERROR_OK)
 		return retval;
 
 	/* convert code into a buffer in target endianness */
-	for (i = 0; i < ARRAY_SIZE(check_code); i++) {
+	for (i = 0; i < ARRAY_SIZE(check_code_le) / 4; i++) {
 		retval = target_write_u32(target,
 				check_algorithm->address
 				+ i * sizeof(uint32_t),
-				check_code[i]);
+				le_to_h_u32(&check_code_le[i * 4]));
 		if (retval != ERROR_OK)
 			goto cleanup;
 	}
@@ -1566,7 +1560,7 @@ int arm_blank_check_memory(struct target *target,
 
 	/* armv4 must exit using a hardware breakpoint */
 	if (arm->is_armv4)
-		exit_var = check_algorithm->address + sizeof(check_code) - 4;
+		exit_var = check_algorithm->address + sizeof(check_code_le) - 4;
 
 	retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
 			check_algorithm->address,