1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
|
/* Title: SparcRegClassInfo.h -*- C++ -*-
Author: Ruchira Sasanka
Date: Aug 20, 01
Purpose: Contains the description of integer register class of Sparc
*/
#ifndef SPARC_REG_INFO_CLASS_H
#define SPARC_REG_INFO_CLASS_H
#include "llvm/Target/MachineRegInfo.h"
#include "llvm/CodeGen/IGNode.h"
//-----------------------------------------------------------------------------
// Integer Register Class
//-----------------------------------------------------------------------------
// Int register names in same order as enum in class SparcIntRegOrder
static string const IntRegNames[] =
{
"o0", "o1", "o2", "o3", "o4", "o5", "o7",
"l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",
"i0", "i1", "i2", "i3", "i4", "i5",
"g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",
"i6", "i7", "o6" };
class SparcIntRegOrder{
public:
enum RegsInPrefOrder // colors possible for a LR (in preferred order)
{
// --- following colors are volatile across function calls
// %g0 can't be used for coloring - always 0
//%g1-%g5 (g6-7 are reserved for system)
o0, o1, o2, o3, o4, o5, o7, // %o0-%o5,
// %o6 is sp,
// all %0's can get modified by a call
// --- following colors are NON-volatile across function calls
l0, l1, l2, l3, l4, l5, l6, l7, // %l0-%l7
i0, i1, i2, i3, i4, i5, // %i0-%i5: i's need not be preserved
// %i6 is the fp - so not allocated
// %i7 is the ret address by convention - can be used for others
// max # of colors reg coloring can allocate (NumOfAvailRegs)
// --- following colors are not available for allocation within this phase
// --- but can appear for pre-colored ranges
g0, g1, g2, g3, g4, g5, g6, g7, i6, i7, o6
//*** NOTE: If we decide to use globals, some of them are volatile
//**** see sparc64ABI (change isRegVloatile method below)
};
// max # of colors reg coloring can allocate
static unsigned int const NumOfAvailRegs = g0;
static unsigned int const StartOfNonVolatileRegs = l0;
static unsigned int const StartOfAllRegs = o0;
static unsigned int const NumOfAllRegs = o6 + 1;
static const string getRegName(const unsigned reg) {
assert( reg < NumOfAllRegs );
return IntRegNames[reg];
}
};
class SparcIntRegClass : public MachineRegClassInfo
{
public:
SparcIntRegClass(unsigned ID)
: MachineRegClassInfo(ID,
SparcIntRegOrder::NumOfAvailRegs,
SparcIntRegOrder::NumOfAllRegs)
{ }
void colorIGNode(IGNode * Node, bool IsColorUsedArr[] ) const;
inline bool isRegVolatile(const int Reg) const {
return (Reg < (int) SparcIntRegOrder::StartOfNonVolatileRegs);
}
};
//-----------------------------------------------------------------------------
// Float Register Class
//-----------------------------------------------------------------------------
static string const FloatRegNames[] =
{
"f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", "f8", "f9",
"f10", "f11", "f12", "f13", "f14", "f15", "f16", "f17", "f18", "f19",
"f20", "f21", "f22", "f23", "f24", "f25", "f26", "f27", "f28", "f29",
"f30", "f31", "f32", "f33", "f34", "f35", "f36", "f37", "f38", "f39",
"f40", "f41", "f42", "f43", "f44", "f45", "f46", "f47", "f48", "f49",
"f50", "f51", "f52", "f53", "f54", "f55", "f56", "f57", "f58", "f59",
"f60", "f61", "f62", "f63"
};
class SparcFloatRegOrder{
public:
enum RegsInPrefOrder {
f0, f1, f2, f3, f4, f5, f6, f7, f8, f9,
f10, f11, f12, f13, f14, f15, f16, f17, f18, f19,
f20, f21, f22, f23, f24, f25, f26, f27, f28, f29,
f30, f31, f32, f33, f34, f35, f36, f37, f38, f39,
f40, f41, f42, f43, f44, f45, f46, f47, f48, f49,
f50, f51, f52, f53, f54, f55, f56, f57, f58, f59,
f60, f61, f62, f63
};
// there are 64 regs alltogether but only 32 regs can be allocated at
// a time.
static unsigned int const NumOfAvailRegs = 32;
static unsigned int const NumOfAllRegs = 64;
static unsigned int const StartOfNonVolatileRegs = f32;
static unsigned int const StartOfAllRegs = f0;
static const string getRegName(const unsigned reg) {
assert( reg < NumOfAllRegs );
return FloatRegNames[reg];
}
};
class SparcFloatRegClass : public MachineRegClassInfo
{
private:
int findFloatColor(const LiveRange *const LR, unsigned Start,
unsigned End, bool IsColorUsedArr[] ) const;
public:
SparcFloatRegClass(unsigned ID)
: MachineRegClassInfo(ID,
SparcFloatRegOrder::NumOfAvailRegs,
SparcFloatRegOrder::NumOfAllRegs)
{ }
void colorIGNode(IGNode * Node, bool IsColorUsedArr[] ) const;
// according to Sparc 64 ABI, all %fp regs are volatile
inline bool isRegVolatile(const int Reg) const { return true; }
};
//-----------------------------------------------------------------------------
// Int CC Register Class
// Only one integer cc register is available
//-----------------------------------------------------------------------------
class SparcIntCCRegClass : public MachineRegClassInfo
{
public:
SparcIntCCRegClass(unsigned ID)
: MachineRegClassInfo(ID,1, 1) { }
inline void colorIGNode(IGNode * Node, bool IsColorUsedArr[] ) const {
Node->setColor(0); // only one int cc reg is available
}
// *** TODO: Check this
inline bool isRegVolatile(const int Reg) const { return true; }
};
//-----------------------------------------------------------------------------
// Float CC Register Class
// Only 4 Float CC registers are available
//-----------------------------------------------------------------------------
static string const FloatCCRegNames[] =
{
"fcc0", "fcc1", "fcc2", "fcc3"
};
class SparcFloatCCRegOrder{
public:
enum RegsInPrefOrder {
fcc0, fcc1, fcc2, fcc3
};
static const string getRegName(const unsigned reg) {
assert( reg < 4 );
return FloatCCRegNames[reg];
}
// according to Sparc 64 ABI, all %fp regs are volatile
inline bool isRegVolatile(const int Reg) const { return true; }
};
class SparcFloatCCRegClass : public MachineRegClassInfo
{
public:
SparcFloatCCRegClass(unsigned ID)
: MachineRegClassInfo(ID, 4, 4) { }
void colorIGNode(IGNode * Node, bool IsColorUsedArr[] ) const {
int c;
for(c=0; c < 4 && IsColorUsedArr[c] ; ++c) ; // find color
assert( (c < 4) && "Can allocate only 4 float cc registers");
Node->setColor(c);
}
// *** TODO: Check this
inline bool isRegVolatile(const int Reg) const { return true; }
};
#endif
|
