path: root/lib/Target/NVPTX/NVPTXISelDAGToDAG.cpp

//===-- NVPTXISelDAGToDAG.cpp - A dag to dag inst selector for NVPTX ------===//
//
//                     The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file defines an instruction selector for the NVPTX target.
//
//===----------------------------------------------------------------------===//


#include "NVPTXISelDAGToDAG.h"
#include "llvm/IR/GlobalValue.h"
#include "llvm/IR/Instructions.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Target/TargetIntrinsicInfo.h"

#undef DEBUG_TYPE
#define DEBUG_TYPE "nvptx-isel"

using namespace llvm;


static cl::opt<bool>
UseFMADInstruction("nvptx-mad-enable",
                   cl::ZeroOrMore,
                cl::desc("NVPTX Specific: Enable generating FMAD instructions"),
                   cl::init(false));

static cl::opt<int>
FMAContractLevel("nvptx-fma-level",
                 cl::ZeroOrMore,
                 cl::desc("NVPTX Specific: FMA contraction (0: don't do it"
                     " 1: do it  2: do it aggressively"),
                     cl::init(2));


static cl::opt<int>
UsePrecDivF32("nvptx-prec-divf32",
              cl::ZeroOrMore,
             cl::desc("NVPTX Specifies: 0 use div.approx, 1 use div.full, 2 use"
                  " IEEE Compliant F32 div.rnd if avaiable."),
                  cl::init(2));

/// createNVPTXISelDag - This pass converts a legalized DAG into a
/// NVPTX-specific DAG, ready for instruction scheduling.
FunctionPass *llvm::createNVPTXISelDag(NVPTXTargetMachine &TM,
                                       llvm::CodeGenOpt::Level OptLevel) {
  return new NVPTXDAGToDAGISel(TM, OptLevel);
}


NVPTXDAGToDAGISel::NVPTXDAGToDAGISel(NVPTXTargetMachine &tm,
                                     CodeGenOpt::Level OptLevel)
: SelectionDAGISel(tm, OptLevel),
  Subtarget(tm.getSubtarget<NVPTXSubtarget>())
{
  // Always do fma.f32 fpcontract if the target supports the instruction.
  // Always do fma.f64 fpcontract if the target supports the instruction.
  // Do mad.f32 is nvptx-mad-enable is specified and the target does not
  // support fma.f32.

  doFMADF32 = (OptLevel > 0) && UseFMADInstruction && !Subtarget.hasFMAF32();
  doFMAF32 =  (OptLevel > 0) && Subtarget.hasFMAF32() &&
      (FMAContractLevel>=1);
  doFMAF64 =  (OptLevel > 0) && Subtarget.hasFMAF64() &&
      (FMAContractLevel>=1);
  doFMAF32AGG =  (OptLevel > 0) && Subtarget.hasFMAF32() &&
      (FMAContractLevel==2);
  doFMAF64AGG =  (OptLevel > 0) && Subtarget.hasFMAF64() &&
      (FMAContractLevel==2);

  allowFMA = (FMAContractLevel >= 1) || UseFMADInst