//===- ARMRegisterInfo.cpp - ARM Register Information -----------*- C++ -*-===////// The LLVM Compiler Infrastructure//// This file was developed by the "Instituto Nokia de Tecnologia" and// is distributed under the University of Illinois Open Source// License. See LICENSE.TXT for details.////===----------------------------------------------------------------------===////// This file contains the ARM implementation of the MRegisterInfo class.////===----------------------------------------------------------------------===//#include"ARM.h"#include"ARMAddressingModes.h"#include"ARMInstrInfo.h"#include"ARMMachineFunctionInfo.h"#include"ARMRegisterInfo.h"#include"ARMSubtarget.h"#include"llvm/Constants.h"#include"llvm/DerivedTypes.h"#include"llvm/CodeGen/MachineConstantPool.h"#include"llvm/CodeGen/MachineFrameInfo.h"#include"llvm/CodeGen/MachineFunction.h"#include"llvm/CodeGen/MachineInstrBuilder.h"#include"llvm/CodeGen/MachineLocation.h"#include"llvm/Target/TargetFrameInfo.h"#include"llvm/Target/TargetMachine.h"#include"llvm/Target/TargetOptions.h"#include"llvm/ADT/BitVector.h"#include"llvm/ADT/SmallVector.h"#include"llvm/ADT/STLExtras.h"#include<algorithm>usingnamespacellvm;unsignedARMRegisterInfo::getRegisterNumbering(unsignedRegEnum){usingnamespaceARM;switch(RegEnum){caseR0:caseS0:caseD0:return0;caseR1:caseS1:caseD1:return1;caseR2:caseS2:caseD2:return2;caseR3:caseS3:caseD3:return3;caseR4:caseS4:caseD4:return4;caseR5:caseS5:caseD5:return5;caseR6:caseS6:caseD6:return6;caseR7:caseS7:caseD7:return7;caseR8:caseS8:caseD8:return8;caseR9:caseS9:caseD9:return9;caseR10:caseS10:caseD10:return10;caseR11:caseS11:caseD11:return11;caseR12:caseS12:caseD12:return12;caseSP:caseS13:
