| Age | Commit message (Expand) | Author |
|---|
| 2010-07-12 | Convert some tab stops into spaces. | Duncan Sands |
| 2010-07-07 | Implement the major chunk of PR7195: support for 'callw' | Chris Lattner |
| 2010-06-11 | More AVX instructions ({ADD,SUB,MUL,DIV}{SS,SD}rm) | Bruno Cardoso Lopes |
| 2010-06-08 | Reapply r105521, this time appending "LLU" to 64 bit | Bruno Cardoso Lopes |
| 2010-06-05 | revert r105521, which is breaking the buildbots with stuff like this: | Chris Lattner |
| 2010-06-05 | Initial AVX support for some instructions. No patterns matched | Bruno Cardoso Lopes |
| 2010-05-20 | tblgen/Target: Add a isAsmParserOnly bit, and teach the disassembler to honor | Daniel Dunbar |
| 2010-05-06 | Eliminated the classification of control registers into %ecr_ | Sean Callanan |
| 2010-04-07 | Fixed a bug where the disassembler would allow an immediate | Sean Callanan |
| 2010-03-14 | Check in tablegen changes to fix disassembler related failures caused by r98465. | Evan Cheng |
| 2010-02-24 | Changed the table generator so that the X86 | Sean Callanan |
| 2010-02-13 | Added the rdtscp instruction to the x86 instruction | Sean Callanan |
| 2010-02-13 | Fixed encodings for invlpg, invept, and invvpid. | Sean Callanan |
| 2010-02-13 | remove special cases for vmlaunch, vmresume, vmxoff, and swapgs | Chris Lattner |
| 2010-02-12 | Remove special cases for [LM]FENCE, MONITOR and MWAIT from | Chris Lattner |
| 2010-02-12 | Reworked the Intel disassembler to support instructions | Sean Callanan |
| 2010-02-12 | add a bunch of mod/rm encoding types for fixed mod/rm bytes. | Chris Lattner |
| 2010-02-10 | Introduce a new CodeGenInstruction::ConstraintInfo class | Chris Lattner |
| 2009-12-22 | Fixes to the X86 disassembler: | Sean Callanan |
| 2009-12-19 | Add missing newlines at EOF (for clang++). | Daniel Dunbar |
| 2009-12-19 | Table-driven disassembler for the X86 architecture (16-, 32-, and 64-bit | Sean Callanan |
