aboutsummaryrefslogtreecommitdiff
path: root/utils/TableGen/InstrInfoEmitter.cpp
AgeCommit message (Expand)Author
2009-10-29Rename usesCustomDAGSchedInserter to usesCustomInserter, and update aDan Gohman
2009-10-01Add instruction flags: hasExtraSrcRegAllocReq and hasExtraDefRegAllocReq. WhenEvan Cheng
2009-09-28Introduce the TargetInstrInfo::KILL machine instruction and get rid of theJakob Stoklund Olesen
2009-08-24prune the #includes in raw_ostream.h by moving a Chris Lattner
2009-07-291. Introduce a new TargetOperandInfo::getRegClass() helper methodChris Lattner
2009-07-29make ptr_rc derive from a new PointerLikeRegClass tblgen class.Chris Lattner
2009-07-03Replace std::iostreams with raw_ostream in TableGen.Daniel Dunbar
2009-04-13Rename COPY_TO_SUBCLASS to COPY_TO_REGCLASS, and generalizeDan Gohman
2009-04-13Add a new TargetInstrInfo MachineInstr opcode, COPY_TO_SUBCLASS.Dan Gohman
2008-12-03Rename isSimpleLoad to canFoldAsLoad, to better reflect its meaning.Dan Gohman
2008-10-17Add RCBarriers to TargetInstrDesc. It's a list of register classes the given ...Evan Cheng
2008-07-01Split ISD::LABEL into ISD::DBG_LABEL and ISD::EH_LABEL, eliminatingDan Gohman
2008-05-31Teach the DAGISelEmitter to not compute the variable_ops operandDan Gohman
2008-05-29Fix a tblgen problem handling variable_ops in tblgen instructionDan Gohman
2008-05-28Add a flag to indicate that an instruction is as cheap (or cheaper) than a moveBill Wendling
2008-04-03Move instruction flag inference out of InstrInfoEmitter and intoDan Gohman
2008-03-16Make insert_subreg a two-address instruction, vastly simplifying LowerSubregs...Christopher Lamb
2008-03-15Remove isImplicitDef TargetInstrDesc flag.Evan Cheng
2008-03-15Replace all target specific implicit def instructions with a target independe...Evan Cheng
2008-02-02SDIsel processes llvm.dbg.declare by recording the variable debug information...Evan Cheng
2008-01-10Simplify the side effect stuff a bit more and make licm/sinkingChris Lattner
2008-01-10Start inferring side effect information more aggressively, and fix many bugs ...Chris Lattner
2008-01-10if an instr lacks a pattern, assume it has side effects (unless never has s-e...Chris Lattner
2008-01-10start inferring 'no side effects'.Chris Lattner
2008-01-10Infer mayloadChris Lattner
2008-01-10realize that instructions who match intrinsics that read memory read memory.Chris Lattner
2008-01-08add a mayLoad property for machine instructions, a correlary to mayStore.Chris Lattner
2008-01-07rename TargetInstrDescriptor -> TargetInstrDesc.Chris Lattner
2008-01-07Rename all the M_* flags to be namespace qualified enums, and switch Chris Lattner
2008-01-07rename hasVariableOperands() -> isVariadic(). Add some comments.Chris Lattner
2008-01-07Move M_* flags down in the file. Move SchedClass up in the Chris Lattner
2008-01-07the name field of instructions is never set to a non-empty string, Chris Lattner
2008-01-07Add predicates methods to TargetOperandInfo, and switch all clients Chris Lattner
2008-01-06rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate.Chris Lattner
2008-01-06rename isStore -> mayStore to more accurately reflect what it captures.Chris Lattner
2008-01-06Change the 'isStore' inferrer to look for 'SDNPMayStore' Chris Lattner
2008-01-06set the 'isstore' flag for instructions whose pattern is an Chris Lattner
2008-01-06remove some old hacky code that tried to infer whether a store Chris Lattner
2008-01-06rearrange some code to allow inferring instr info from the pattern of the ins...Chris Lattner
2008-01-06final cleanups.Chris Lattner
2008-01-06further simplifications and cleanupChris Lattner
2008-01-06simplify some codeChris Lattner
2008-01-06split enum emission out from InstrInfoEmitter into it's own tblgen backend.Chris Lattner
2007-12-30tblgen shouldn't include headers from llvm codegen.Chris Lattner
2007-12-29remove attributions from utils.Chris Lattner
2007-12-14Add flags to indicate that there are "never" side effects or that there "may be"Bill Wendling
2007-12-13Oops. Forgot these.Evan Cheng
2007-11-12Add a flag for indirect branch instructions.Owen Anderson
2007-08-02Added TargetInstrDescriptor::numDefs - num of results.Evan Cheng
2007-07-26Add target independent MachineInstr's to represent subreg insert/extract in M...Christopher Lamb