| Age | Commit message (Expand) | Author |
|---|
| 2012-02-15 | For ELF, also call fixSymbolsInTLSFixups() on expressions passed to EmitValue... | David Meyer |
| 2012-02-09 | Teach the MC and disassembler about SoftFail, and hook it up to UNPREDICTABLE... | James Molloy |
| 2012-01-31 | Fixed a crash in llvm-mc for Mach-O when a symbol difference expression uses a | Kevin Enderby |
| 2012-01-30 | Intel syntax. Adjust special code, used to recognize cmp<comparison code>{ss,... | Devang Patel |
| 2012-01-30 | Intel syntax. Support .intel_syntax directive. | Devang Patel |
| 2012-01-28 | Ensure .AliasedSymbol() is called on all uses of getSymbol(). Affects ARM and... | James Molloy |
| 2012-01-28 | Small improvement to the recursion detection logic from the previous commit. | Rafael Espindola |
| 2012-01-28 | Handle recursive variable definitions directly. This gives us better error | Rafael Espindola |
| 2012-01-27 | Intel Syntax: Parse mem operand with seg reg. QWORD PTR FS:[320] | Devang Patel |
| 2012-01-26 | Add support for the R_ARM_TARGET1 relocation, which should be given to reloca... | James Molloy |
| 2012-01-25 | ARM assemly parsing and validation of IT instruction. | Jim Grosbach |
| 2012-01-25 | NEON VLD4(all lanes) assembly parsing and encoding. | Jim Grosbach |
| 2012-01-24 | NEON VLD3(all lanes) assembly parsing and encoding. | Jim Grosbach |
| 2012-01-24 | ARM Darwin symbol ref differences w/o subsection-via-symbols. | Jim Grosbach |
| 2012-01-24 | Intel Syntax: Extend special hand coded logic, to recognize special instructi... | Devang Patel |
| 2012-01-24 | NEON VST4(one lane) assembly parsing and encoding. | Jim Grosbach |
| 2012-01-24 | NEON VLD4(one lane) assembly parsing and encoding. | Jim Grosbach |
| 2012-01-24 | NEON Two-operand assembly aliases for VSRA. | Jim Grosbach |
| 2012-01-24 | Remove redundant test file. | Jim Grosbach |
| 2012-01-24 | NEON Two-operand assembly aliases for VSLI. | Jim Grosbach |
| 2012-01-24 | NEON Two-operand assembly aliases for VSRI. | Jim Grosbach |
| 2012-01-24 | Tidy up. | Jim Grosbach |
| 2012-01-24 | NEON VST4(multiple 4 element structures) assembly parsing. | Jim Grosbach |
| 2012-01-24 | NEON VLD4(multiple 4 element structures) assembly parsing. | Jim Grosbach |
| 2012-01-24 | NEON VST3(single element from one lane) assembly parsing. | Jim Grosbach |
| 2012-01-23 | NEON VST3(multiple 3-element structures) assembly parsing. | Jim Grosbach |
| 2012-01-23 | NEON VLD3(multiple 3-element structures) assembly parsing. | Jim Grosbach |
| 2012-01-23 | Intel syntax: Robustify parsing of memory operand's displacement experssion. | Devang Patel |
| 2012-01-23 | NEON VLD3 lane-indexed assembly parsing and encoding. | Jim Grosbach |
| 2012-01-23 | Add support for .cfi_signal_frame. Fixes pr11762. | Rafael Espindola |
| 2012-01-23 | Intel syntax: Parse memory operand with empty base reg, e.g. DWORD PTR [4*RDI] | Devang Patel |
| 2012-01-23 | Simplify some NEON assembly pseudo definitions. | Jim Grosbach |
| 2012-01-23 | Intel syntax: Parse segment registers. | Devang Patel |
| 2012-01-20 | Intel syntax: Robustify register parsing. | Devang Patel |
| 2012-01-20 | Intel syntax: Parse ... PTR [-8] | Devang Patel |
| 2012-01-20 | Intel syntax: For now, disable ambiguous JMP64pcrel32 for intel syntax. | Devang Patel |
| 2012-01-20 | NEON use vmov.i32 to splat some f32 values into vectors. | Jim Grosbach |
| 2012-01-19 | Post process 'and', 'sub' instructions and select better encoding, if available. | Devang Patel |
| 2012-01-19 | Intel syntax: There is no need to create unary expr for simple negative displ... | Devang Patel |
| 2012-01-19 | Post process 'xor', 'or' and 'cmp' instructions and select better encoding, i... | Devang Patel |
| 2012-01-19 | Add testcase. | Jim Grosbach |
| 2012-01-18 | Thumb2 alternate syntax for LDR(literal) and friends. | Jim Grosbach |
| 2012-01-18 | Process instructions after match to select alternative encoding which may be ... | Devang Patel |
| 2012-01-18 | Thumb2 relaxation for LDR(literal). | Jim Grosbach |
| 2012-01-17 | MC tweak symbol difference resolution for non-local symbols. | Jim Grosbach |
| 2012-01-17 | Tidy up. | Jim Grosbach |
| 2012-01-17 | Intel syntax: Fix parser match class to check memory operand size. | Devang Patel |
| 2012-01-17 | Intel syntax: Parse "BYTE PTR [RDX + RCX]" | Devang Patel |
| 2012-01-17 | Intel syntax: Do not unncessarily create plus expression for memory operand d... | Devang Patel |
| 2012-01-17 | Intel syntax: Ignore mnemonic aliases. | Devang Patel |
