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2011-09-16Fix disassembly of Thumb2 BFI instructions with bit range of [0, 32).Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139964 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16Add fixed bits to correctly distinguish Thumb2 SSAT/SSAT16's.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139958 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16Fix disassembly of Thumb2 LDRSH with a #-0 offset.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139943 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16Port over more Thumb2 assembly tests to disassembly tests.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139915 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-16Port over more Thumb2 assembly tests to disassembly tests.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139912 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-14Fix mem type for VEX.128 form of VROUNDP*. Remove filter preventing VROUND ↵Craig Topper
from being recognized by disassembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139691 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-14Make disassembling of VBLEND* print immediate as a XMM/YMM register name. ↵Craig Topper
Fixes PR10917. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139690 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-14Add test case for PR10851.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139689 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-13Make use of Eli's FileCheck sorcery to improve this test.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139645 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-13Correct disassembly printing of Thumb2 post-incremented LDRD and STRD.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139639 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-13Remove filter that was preventing MOVDQU/MOVDQA and their VEX forms from ↵Craig Topper
being disassembled. Also added encodings for the other register/register form of these instructions. Fixes PR10848. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139588 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-12Thumb2 POP's don't allow the PC as an operand, and PUSH's don't allow the SP ↵Owen Anderson
either. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139542 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-12Port more encoding tests to decoding tests, and correct an improper Thumb2 ↵Owen Anderson
pre-indexed load decoding this uncovered. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139522 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-11Fix disassembling of one of the register/register forms of ↵Craig Topper
MOVUPS/MOVUPD/MOVAPS/MOVAPD/MOVSS/MOVSD and their VEX equivalents. Fixes PR10877. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139486 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-11Fix disassembling of reverse register/register forms of ↵Craig Topper
ADD/SUB/XOR/OR/AND/SBB/ADC/CMP/MOV. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139485 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-11Fix disassembling of PAUSE instruction. Fixes PR10900. Also fixed NOP ↵Craig Topper
disassembling to ignore OpSize and REX.W. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139484 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-09LDM writeback is not allowed if Rn is in the target register list.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139432 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-09Fix assembly/disassembly of Thumb2 ADR instructions with immediate operands.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139422 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-09Add disassembler test for Intel syntax. Tests r139353.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139356 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-08Soft fail CBZ/CBNZ in the disassembler if they appear inside an IT block.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139328 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-08Thumb2 assembly parsing and encoding for LDRD(immediate).Jim Grosbach
Refactor operand handling for STRD as well. Tests for that forthcoming. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139322 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-07Create Thumb2 versions of STC/LDC, and reenable the relevant tests.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139256 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-07Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds ↵James Molloy
predicate checking to the Disassembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139250 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-07Update test for 139243Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139244 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-07Port more assembler tests over to disassembler tests, and fix a minor logic ↵Owen Anderson
error that exposed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139240 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-06Port more encoding tests over to Thumb2 decoding tests.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139171 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02Change X86 disassembly to print immediates values as signed by default. SpecialKevin Enderby
case those instructions that the immediate is not sign-extend. radr://8795217 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139028 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02Fix the disassembly of the X86 "crc32w %ax, %eax" instruction. Bug 10702.Kevin Enderby
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@139014 91177308-0d34-0410-b5e6-96231b3b80d8
2011-09-02Make IC_VEX* not inherit from IC_*. Prevents instructions with no VEX form ↵Craig Topper
from disassembling to their non-VEX form. Also prevents weak filter collisons that were keeping valid VEX instructions from decoding properly. Make VEX_L* not inherit from VEX_* because the VEX.L bit always important. This stops packed int VEX encodings from being disassembled when specified with VEX.L=1. Fixes PR10831 and PR10806. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138997 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30Fix issues with disassembly of IT instructions involving condition codes ↵Owen Anderson
other the EQ/NE. Discovered by roundtrip testing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138840 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30Port Thumb2 assembler tests over to disassembler tests.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138822 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-30Add vvvv support to disassembling of instructions with MRMDestMem and ↵Craig Topper
MRMDestReg form. Needed to support mem dest form of vmaskmovps/d. Fixes PR10807. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138795 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-29Fix the disassembly of the X86 crc32 instruction. Bug 10702 and rdar://8795217Kevin Enderby
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138771 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26Improve encoding support for BLX with immediat eoperands, and fix a BLX ↵Owen Anderson
decoding bug this uncovered. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138675 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26invalid-LDR_PRE-arm.txt was already passing, but for the wrong reasons. We ↵Owen Anderson
were failing to specify enough fixed bits of LDR_PRE/LDRB_PRE, resulting in decoding conflicts. Separate them into immediate vs. register versions, allowing us to specify the necessary fixed bits. This in turn results in the test being decoded properly, and being rejected as UNPREDICTABLE rather than a hard failure. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138653 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26Support an extension of ARM asm syntax to allow immediate operands to ADR ↵Owen Anderson
instructions. This is helpful for disassembler testing, and indeed exposed a disassembler bug that is also fixed here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138635 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26Add a testcase for r138625.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138626 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-26Fix disassembling of VCVTSD2SICraig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138623 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25Port over additional encoding tests to decoding tests, and fix an operand ↵Owen Anderson
ordering bug this exposed. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138575 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25Give ATTR_VEX higher priority when generating the disassembler context ↵Craig Topper
table. Fixes disassembling of VEX instructions with 'pp'=00. Fixes subset of PR10678. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138552 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-25Add TB encoding to VEROALL, VZEROUPPER, and VCVTPS2PD to allow them to be ↵Craig Topper
disassembled. Fixes PR10723. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138551 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-24Port over more encoding tests to decoding tests.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138441 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23Fix decoding of Thumb2 prefetch instructions, which account for all the ↵Owen Anderson
remaining Thumb2 decoding failures found by randomized testing so far. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138341 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23Fix two more instances of mis-matched operand names breaking disassembly. ↵Owen Anderson
Found by randomized testing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138337 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-23Port more assemble tests over to disassembly tests.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138336 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22t2SMLAD is a four-register instruction, not a three-register one.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138301 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22Correct operand naming of t2USAT16 to allow proper decoding.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138300 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22Match operand naming to allow correct decoding of t2LDRSH_POST.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138298 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22Provide a correct decoder hook for Thumb2 shifted registers. Found by ↵Owen Anderson
randomized testing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138292 91177308-0d34-0410-b5e6-96231b3b80d8
2011-08-22Provide operand encoding information for half-precision VCVT instructions. ↵Owen Anderson
Found by randomized testing. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@138273 91177308-0d34-0410-b5e6-96231b3b80d8
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