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AgeCommit message (Expand)Author
2013-03-11Fixes disassembler crashes on 2013 Haswell RTM instructions.Kevin Enderby
2013-02-28AArch64: remove post-encoder method from FCMP (immediate) instructions.Tim Northover
2013-02-22Make ARMAsmPrinter generate the correct alignment specifier syntax in instruc...Kristof Beyls
2013-02-17[XCore] Add missing 2r instructions.Richard Osborne
2013-02-17[XCore] Add TSETR instruction.Richard Osborne
2013-02-17[XCore] Add missing u10 / lu10 instructions.Richard Osborne
2013-02-17[XCore] Add missing u6 / lu6 instructions.Richard Osborne
2013-02-14death to extra whitespaceKay Tiong Khoo
2013-02-14added basic support for Intel ADX instructionsKay Tiong Khoo
2013-02-14Make ARMAsmParser accept the correct alignment specifier syntax in instructions.Kristof Beyls
2013-02-12added test cases for r174920 (prefetch disassembly)Kay Tiong Khoo
2013-02-11*fixed disassembly of some i386 system insts with intel syntaxKay Tiong Khoo
2013-02-06Add AArch64 CRC32 instructionsTim Northover
2013-02-06Add icache prefetch operations to AArch64Tim Northover
2013-01-31Add AArch64 as an experimental target.Tim Northover
2013-01-27[XCore] Add missing l2rus instructions.Richard Osborne
2013-01-27[XCore] Add missing l2r instructions.Richard Osborne
2013-01-27[XCore] Add missing 1r instructions.Richard Osborne
2013-01-27[XCore] Add missing 0r instructions.Richard Osborne
2013-01-25Add instruction encodings / disassembly support for l4r instructions.Richard Osborne
2013-01-25Add instruction encodings / disassembly support for l5r instructions.Richard Osborne
2013-01-23Add instruction encodings / disassembly support for l6r instructions.Richard Osborne
2013-01-22Add instruction encodings / disassembly support for u10 / lu10 instructions.Richard Osborne
2013-01-21Add instruction encodings / disassembly support for u6 / lu6 instructions.Richard Osborne
2013-01-21Add instruction encoding / disassembly support for ru6 / lru6 instructions.Richard Osborne
2013-01-20Add instruction encodings / disassembly support for l2rus instructions.Richard Osborne
2013-01-20Add instruction encodings / disassembly support for l3r instructions.Richard Osborne
2013-01-20Add instruction encodings / disassembler support for 2rus instructions.Richard Osborne
2013-01-20Add instruction encodings / disassembly support 3r instructions.Richard Osborne
2013-01-17This is a resubmittal. For some reason it broke the bots yesterdayJack Carter
2013-01-16reverting 172579Jack Carter
2013-01-16Akira,Jack Carter
2013-01-06Fix suffix handling for parsing and printing of cvtsi2ss, cvtsi2sd, cvtss2si,...Craig Topper
2012-12-19Remove edis - the enhanced disassembler. Fixes PR14654.Roman Divacky
2012-12-17Add instruction encodings / disassembly support for l2r instructions.Richard Osborne
2012-12-17Add instruction encodings for PEEK and ENDIN.Richard Osborne
2012-12-17Add instruction encodings / disassembly support for rus instructions.Richard Osborne
2012-12-17Add instruction encodings for ZEXT and SEXT.Richard Osborne
2012-12-17Add instruction encodings / disassembly support for 2r instructions.Richard Osborne
2012-12-17Add instruction encodings / disassembly support for 0r instructions.Richard Osborne
2012-12-16Add tests for disassembly of 1r XCore instructions.Richard Osborne
2012-12-05Added a option to the disassembler to print immediates as hex.Kevin Enderby
2012-11-29Fixed the arm disassembly of invalid BFI instructions to not build a bad MCInstKevin Enderby
2012-11-26Make this test less sensitive.Eli Bendersky
2012-11-14Remove DOS line endings.Jakub Staszak
2012-11-02[mips] Fix disassembler test cases.Akira Hatanaka
2012-10-30ARM: Better disassembly for pc-relative LDR.Jim Grosbach
2012-10-29Fix ARM's b.w instruction for thumb 2 and the encoding T4. The branch targetKevin Enderby
2012-10-22Add support for annotated disassembly output for X86 and arm.Kevin Enderby
2012-09-06Diagnose invalid alignments on duplicating VLDn instructions.Tim Northover
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