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path: root/test/MC/Disassembler/arm-tests.txt
AgeCommit message (Expand)Author
2010-11-14Segregate tests by target.Dale Johannesen
2010-10-15ARM instructions that are both predicated and set the condition codesBob Wilson
2010-10-13Refactor the ARM 'setend' instruction pattern. Use a single instruction patternJim Grosbach
2010-08-17Change ARM PKHTB and PKHBT instructions to use a shift_imm operand to avoidBob Wilson
2010-08-12Cleaned up the for-disassembly-only entries in the arm instruction table so thatJohnny Chen
2010-08-12The autogened decoder was confusing the ARM STRBT for ARM USAT, because the .tdJohnny Chen
2010-08-11Changed the format of DMBsy, DSBsy, and friends from Pseudo to MiscFrm.Johnny Chen
2010-08-11Move the ARM SSAT and USAT optional shift amount operand out of theBob Wilson
2010-08-05Add an ARM RSCrr instruction for disassembly only.Bob Wilson
2010-08-05Add an ARM RSBrr instruction for disassembly only.Bob Wilson
2010-08-05ARM "rrx" shift operands do not have an immediate. PR7790.Bob Wilson
2010-04-16In the same spirit of r101524, which removed the assert() from printAddrMode2...Johnny Chen
2010-04-16Multiclass LdStCop was using pre-UAL syntax LDC<c>L for the L fragment. ChangedJohnny Chen
2010-04-15Added another test case for am3offset operand, testing Rn, #+/-imm8.Johnny Chen
2010-04-15Fixed a bug in ARM disassembly where LDRSBT should have am3offset operand, notJohnny Chen
2010-04-12Fixed a crasher in arm disassembler within ARMInstPrinter.cpp after callingJohnny Chen
2010-04-07unXFAIL, arm disassembler was reenabled.Benjamin Kramer
2010-04-05Reverting 100265 to try to get buildbots green again. Lots of self-hosting bu...Evan Cheng
2010-04-02Second try of initial ARM/Thumb disassembler check-in. It consists of a tablgenJohnny Chen