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AgeCommit message (Expand)Author
2010-09-08Re-enable usage of the ARM base pointer. r113394 fixed the known failures.Jim Grosbach
2010-09-08Remove ssp from this test.Eric Christopher
2010-09-08Fix CellSPU vector shuffles, again.Kalle Raiskila
2010-09-08disable for the moment while tracking down a few Thumb2-O0 failure that lookJim Grosbach
2010-09-07remove these tests for now.Devang Patel
2010-09-07There is no need to force target if the test is going to run on other x86 pla...Devang Patel
2010-09-07Fix command line used to link these test cases.Devang Patel
2010-09-07Reintroduce dbg-declare tests.Devang Patel
2010-09-07Remove last three tests. I need to make them independent of my setup.Devang Patel
2010-09-07Add a test case to check handling of dbg-declare during hybrid mode where we...Devang Patel
2010-09-07Add a test case to check handling of dbg-declare by selection DAG builder.Devang Patel
2010-09-07Add a test case to check handling of dbg-declare by fast-isel.Devang Patel
2010-09-05implement rdar://6653118 - fastisel should fold loads where possible.Chris Lattner
2010-09-03Remove the rest of the nonexistent 64-bit AVX instructions.Dale Johannesen
2010-09-03Re-apply r112883:Jim Grosbach
2010-09-03Revert "For ARM stack frames that utilize variable sized objects and have eit...Daniel Dunbar
2010-09-03test/CodeGen/X86: Add explicit -mtriple=(i686|x86_64)-linux for Win32 host.NAKAMURA Takumi
2010-09-03AVX doesn't support mm operations neither its instrinsics.Bruno Cardoso Lopes
2010-09-03Replace NEON vabdl, vaba, and vabal intrinsics with combinations of theBob Wilson
2010-09-02Properly emit __chkstk call instead of __alloca on non-mingw windows targets.Anton Korobeynikov
2010-09-02For ARM stack frames that utilize variable sized objects and have eitherJim Grosbach
2010-09-02Don't narrow the load and store in a load+twiddle+store sequence unlessDan Gohman
2010-09-02Fix an unnecessary XFAILSandeep Patel
2010-09-02Now that register allocation properly considers reserved regs, simplify theJim Grosbach
2010-09-02Convert VLD1 and VLD2 instructions to use pseudo-instructions untilBob Wilson
2010-09-02test/loop-strength-reduce4: Add explicit triplet for Win32 host.NAKAMURA Takumi
2010-09-02test/twoaddr-coalesce: Do not use @main.NAKAMURA Takumi
2010-09-01Remove NEON vmull, vmlal, and vmlsl intrinsics, replacing them with multiply,Bob Wilson
2010-09-01Using target specific nodes for shuffle nodes makes the maskBruno Cardoso Lopes
2010-09-01Teach RemoveCopyByCommutingDef to check all aliases, not just subregisters.Jakob Stoklund Olesen
2010-09-01temporarily revert r112664, it is causing a decoding conflict, and Chris Lattner
2010-09-01Revert 112442 and 112440 until the compile time problems introducedDan Gohman
2010-08-31We have a chance for an optimization. Consider this code:Bill Wendling
2010-08-31Update test for 112609Jim Grosbach
2010-08-30Fix borken testAnton Korobeynikov
2010-08-30Remove NEON vmovn intrinsic, replacing it with vector truncate operations.Bob Wilson
2010-08-30two changes:Chris Lattner
2010-08-30Correct bogus module triple specifications.Duncan Sands
2010-08-29Make IVUsers iterative instead of recursive.Dan Gohman
2010-08-29Make this test less dependent on register allocation choices.Dan Gohman
2010-08-29Fix lowering of INSERT_VECTOR_ELT in SPU. Kalle Raiskila
2010-08-29Remove NEON vaddl, vaddw, vsubl, and vsubw intrinsics. Instead, use llvmBob Wilson
2010-08-29merge a bunch of shuffle tests into sse2.llChris Lattner
2010-08-29add some nounwind'sChris Lattner
2010-08-28fix the buildvector->insertp[sd] logic to not always create a redundantChris Lattner
2010-08-28fix the BuildVector -> unpcklps logic to not do pointless shuffles Chris Lattner
2010-08-28Completely disable tail calls when fast-isel is enabled, as fast-iselDan Gohman
2010-08-27Change ARM VFP VLDM/VSTM instructions to use addressing mode #4, just likeBob Wilson
2010-08-27get this test passing on linux builders.Chris Lattner
2010-08-27Add alignment arguments to all the NEON load/store intrinsics.Bob Wilson