| Age | Commit message (Expand) | Author |
| 2012-01-03 | Revert r146997, "Heed spill slot alignment on ARM." | Jakob Stoklund Olesen |
| 2012-01-03 | Revert 147426 because it caused pr11696. | Nadav Rotem |
| 2012-01-03 | Fix incorrect widening of the bitcast sdnode in case the incoming operand is ... | Nadav Rotem |
| 2012-01-03 | Enhance DAGCombine for transforming 128->256 casts into a vmovaps, rather | Chad Rosier |
| 2012-01-03 | Fixed a bug in SelectionDAG.cpp. | Elena Demikhovsky |
| 2012-01-02 | Optimize the sequence blend(sign_extend(x)) to blend(shl(x)) since SSE blend ... | Nadav Rotem |
| 2012-01-01 | Allow CRC32 instructions to be selected when AVX is enabled. | Craig Topper |
| 2012-01-01 | Fix sfence, lfence, mfence, and clflush to be able to be selected when AVX is... | Craig Topper |
| 2012-01-01 | Revert 147399. It broke CodeGen/ARM/vext.ll. | Rafael Espindola |
| 2012-01-01 | Fixed a bug in SelectionDAG.cpp. | Elena Demikhovsky |
| 2011-12-31 | Add patterns for integer forms of SHUFPD/VSHUFPD with a memory load. | Craig Topper |
| 2011-12-31 | Fix typo in a SHUFPD and VSHUFPD pattern that prevented SHUFPD/VSHUFPD with a... | Craig Topper |
| 2011-12-30 | Change FMA4 memory forms to use memopv* instead of alignedloadv*. No need to ... | Craig Topper |
| 2011-12-30 | Fix load size for FMA4 SS/SD instructions. They need to use f32 and f64 size,... | Craig Topper |
| 2011-12-30 | Cleanup stack/frame register define/kill states. This fixes two bugs: | Hal Finkel |
| 2011-12-28 | Fix type-checking for load transformation which is not legal on floating-poin... | Eli Friedman |
| 2011-12-28 | PR11662. | Nadav Rotem |
| 2011-12-28 | Fixed a bug in LowerVECTOR_SHUFFLE and LowerBUILD_VECTOR. | Elena Demikhovsky |
| 2011-12-26 | Make sure DAGCombiner doesn't introduce multiple loads from the same memory l... | Eli Friedman |
| 2011-12-24 | Use standard promotion for i8 CTTZ nodes and i8 CTLZ nodes when the | Chandler Carruth |
| 2011-12-24 | Add systematic testing for cttz as well, and fix the bug I spotted by | Chandler Carruth |
| 2011-12-24 | Add i8 and i64 testing for ctlz on x86. Also simplify the i16 test. | Chandler Carruth |
| 2011-12-24 | Tidy up this rather crufty test. Put the declarations at the top to make | Chandler Carruth |
| 2011-12-24 | Expand more when we have a nice 'tzcnt' instruction, to avoid generating | Chandler Carruth |
| 2011-12-24 | Tidy up some of these tests. | Chandler Carruth |
| 2011-12-24 | Switch the lowering of CTLZ_ZERO_UNDEF from a .td pattern back to the | Chandler Carruth |
| 2011-12-24 | Cleanup this test a bit, sorting things and grouping them more clearly. | Chandler Carruth |
| 2011-12-24 | Test case for r147232. | Akira Hatanaka |
| 2011-12-23 | Experimental support for aligned NEON spills. | Jakob Stoklund Olesen |
| 2011-12-21 | Fix a couple of copy-n-paste bugs. Noticed by George Russell! | Chad Rosier |
| 2011-12-21 | Fix a couple of copy-n-paste bugs. Noticed by George Russell. | Evan Cheng |
| 2011-12-21 | Fix bug in zero-store peephole pattern reported in pr11615. | Akira Hatanaka |
| 2011-12-21 | Expand 64-bit CTLZ nodes if target architecture does not support it. Add test | Akira Hatanaka |
| 2011-12-20 | Test case for r147017. | Akira Hatanaka |
| 2011-12-20 | Add function MipsDAGToDAGISel::SelectMULT and factor out code that generates | Akira Hatanaka |
| 2011-12-20 | 64-bit data directive. | Akira Hatanaka |
| 2011-12-20 | 32-to-64-bit sext_inreg pattern. | Akira Hatanaka |
| 2011-12-20 | Add code in MipsDAGToDAGISel for selecting constant +0.0. | Akira Hatanaka |
| 2011-12-20 | Heed spill slot alignment on ARM. | Jakob Stoklund Olesen |
| 2011-12-20 | ARM target code clean up. Check for iOS, not Darwin where it makes sense. | Evan Cheng |
| 2011-12-20 | This is the second fix related to VZEXT_MOVL node. | Elena Demikhovsky |
| 2011-12-20 | Begin teaching the X86 target how to efficiently codegen patterns that | Chandler Carruth |
| 2011-12-20 | Mark ARM eh_sjlj_dispatchsetup as clobbering all registers. Radar 10567930. | Bob Wilson |
| 2011-12-19 | Move tests to FileCheck. | Evan Cheng |
| 2011-12-19 | Add a test case for r146900. | Akira Hatanaka |
| 2011-12-19 | Add patterns for matching immediates whose lower 16-bit is cleared. These | Akira Hatanaka |
| 2011-12-19 | Remove definitions of double word shift plus 32 instructions. Assembler or | Akira Hatanaka |
| 2011-12-19 | Remove the restriction on the first operand of the add node in SelectAddr. | Akira Hatanaka |
| 2011-12-17 | Fix a CPSR liveness tracking bug introduced when I converted IT block to bundle. | Evan Cheng |
| 2011-12-17 | Make sure that the lower bits on the VSELECT condition are properly set. | Lang Hames |