| Age | Commit message (Expand) | Author |
|---|
| 2012-08-27 | Commit test change for r162658. | Craig Topper |
| 2012-08-27 | FMA3 tests on bdver2 target for changes made in rev 162012. Also made | Anitha Boyapati |
| 2012-08-27 | Make sure that FMA3 is favored even when FMA4 is also enabled. Test case for ... | Craig Topper |
| 2012-08-24 | Infer instruction properties from single-instruction patterns. | Jakob Stoklund Olesen |
| 2012-08-24 | Disable Mips' delay slot filler when optimization level is O0. | Akira Hatanaka |
| 2012-08-24 | In MipsDAGToDAGISel::SelectAddr, fold add node into address operand, if its | Akira Hatanaka |
| 2012-08-24 | BranchProb: modify the definition of an edge in BranchProbabilityInfo to handle | Manman Ren |
| 2012-08-24 | Lower constant pools and jump tables via TOC on PPC64/SVR4. | Roman Divacky |
| 2012-08-22 | Rejected 169195. As Duncan commented, bitcasting to proper type is wrong appr... | Stepan Dyatkovskiy |
| 2012-08-22 | Add register Mips::GP to the list of reserved registers if target is bare-metal | Akira Hatanaka |
| 2012-08-22 | Add option disable-mips-delay-filler. Turn on mips' delay slot filler by | Akira Hatanaka |
| 2012-08-21 | Add correct set of regression tests for r162094 commit. | Tim Northover |
| 2012-08-21 | Add a missing def flag. | Jakob Stoklund Olesen |
| 2012-08-20 | Don't add CFG edges for redundant conditional branches. | Jakob Stoklund Olesen |
| 2012-08-20 | fix a case where all operands of BUILD_VECTOR are undefined | Michael Liao |
| 2012-08-20 | Forget to add testcase for r162195. Sorry. | Stepan Dyatkovskiy |
| 2012-08-19 | When unsafe math is used, we can use commutative FMAX and FMIN. In some cases | Nadav Rotem |
| 2012-08-18 | Also combine zext/sext into selects for ARM. | Jakob Stoklund Olesen |
| 2012-08-18 | Also pass logical ops to combineSelectAndUse. | Jakob Stoklund Olesen |
| 2012-08-18 | Reapply r162160 with a fix: Optimize Arith->Trunc->SETCC sequence to allow be... | Nadav Rotem |
| 2012-08-18 | Revert r162160 because it made a few buildbots fail. | Nadav Rotem |
| 2012-08-18 | The X86 backend has a number of optimizations for SETCC nodes which use | Nadav Rotem |
| 2012-08-17 | Make atomic load and store of pointers work. Tighten verification of atomic ... | Eli Friedman |
| 2012-08-17 | Avoid folding ADD instructions with FI operands. | Jakob Stoklund Olesen |
| 2012-08-17 | TargetLowering: Use the large shift amount during legalize types. The legaliz... | Benjamin Kramer |
| 2012-08-17 | Fix broken check lines. | Benjamin Kramer |
| 2012-08-17 | Implement NEON domain switching for scalar <-> S-register vmovs on ARM | Tim Northover |
| 2012-08-16 | Add ADD and SUB to the predicable ARM instructions. | Jakob Stoklund Olesen |
| 2012-08-16 | [arm-fast-isel] Add support for fastcc. | Jush Lu |
| 2012-08-16 | Test case for r162008. | Akira Hatanaka |
| 2012-08-15 | Fold predicable instructions into MOVCC / t2MOVCC. | Jakob Stoklund Olesen |
| 2012-08-15 | Rework test so that it reproduces the error without the horrible flag. | Bill Wendling |
| 2012-08-15 | Remove invalid test. This test requires that dead basic blocks be kept | Bill Wendling |
| 2012-08-15 | Use vld1/vst1 to load/store f64 if alignment is < 4 and the target allows una... | Evan Cheng |
| 2012-08-14 | The names of VFP variants of half-to-float conversion instructions were | Anton Korobeynikov |
| 2012-08-14 | fix PR11334 | Michael Liao |
| 2012-08-14 | During the CodeGenPrepare we often lower intrinsics (such as objsize) | Nadav Rotem |
| 2012-08-14 | llvm/test/CodeGen/ARM/floorf.ll: Add explicit -mtriple=arm-unknown-unknown, o... | NAKAMURA Takumi |
| 2012-08-13 | Add a roundToIntegral method to APFloat, which can be parameterized over vari... | Owen Anderson |
| 2012-08-13 | Rename test since it's not linux-specific. | Bill Wendling |
| 2012-08-13 | Handle extra Tail predecessors in if-conversion. | Jakob Stoklund Olesen |
| 2012-08-13 | [Hexagon] Don't mark callee saved registers as clobbered by a tail call | Arnold Schwaighofer |
| 2012-08-13 | Fix failure on Atom bot due to r161769 | Manman Ren |
| 2012-08-13 | Do not optimize (or (and X,Y), Z) into BFI and other sequences if the AND ISD... | Nadav Rotem |
| 2012-08-13 | X86: move Int_CVTSD2SSrr, Int_CVTSI2SSrr, Int_CVTSI2SDrr, Int_CVTSS2SDrr from | Manman Ren |
| 2012-08-13 | Add support for the %H output modifier. | Eric Christopher |
| 2012-08-13 | Add test for previous commit correcting NEON load patterns. | Tim Northover |
| 2012-08-12 | Revert 161581: Patch to implement UMLAL/SMLAL instructions for the ARM | Arnold Schwaighofer |
| 2012-08-11 | fix PR13577, an issue introduced by r161687 | Michael Liao |
| 2012-08-11 | PR13578: Teach MachineCSE that instructions that use a constant register can ... | Benjamin Kramer |
