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AgeCommit message (Expand)Author
2012-12-04Merging MIPS GOT changeset into 3.2 release branch.Pawel Wodnicki
2012-11-29Merging r168837: into the 3.2 release branch.Pawel Wodnicki
2012-11-26Merging r167912: into the 3.2 release branch.Pawel Wodnicki
2012-11-23Merging r168320: into 3.2 relase branch.Pawel Wodnicki
2012-11-19Merging r167718 into 3.2 release branchPawel Wodnicki
2012-11-19Merging r167948, r168198: into the 3.2 release branchPawel Wodnicki
2012-11-19Merging r167855 into 3.2 relase branchPawel Wodnicki
2012-11-12[NVPTX] Add more precise PTX/SM target attributesJustin Holewinski
2012-11-10Convert an improper CodeGen test to a MC test.Evan Cheng
2012-11-10xfail a bad test. This is a MC test but it's dependent on a codegen optimizat...Evan Cheng
2012-11-10Disable the Thumb no-return call optimization:Evan Cheng
2012-11-10Cleanup pcmp(e/i)str(m/i) instruction definitions and load folding support.Craig Topper
2012-11-09[NVPTX] Use ABI alignment for parameters when alignment is not specified.Justin Holewinski
2012-11-09Fix assertions in updateRegMaskSlots().Jakob Stoklund Olesen
2012-11-08Recommit modified r167540.Amara Emerson
2012-11-08Add support of RTM from TSX extensionMichael Liao
2012-11-07[mips] Custom-lower ISD::FRAME_TO_ARGS_OFFSET node.Akira Hatanaka
2012-11-07misched: Heuristics based on the machine model.Andrew Trick
2012-11-05On PowerPC64, integer return values (as well as arguments) are supposedUlrich Weigand
2012-11-05Add support for the PowerPC-specific inline asm Z constraint and y modifier.Hal Finkel
2012-11-05[PATCH] PowerPC: Expand load extend vector operationsAdhemerval Zanella
2012-11-03[mips] Set flag neverHasSideEffects flag on floating point conversionAkira Hatanaka
2012-11-03[mips] Set flag isAsCheapAsAMove flag on instruction LUi.Akira Hatanaka
2012-11-03[mips] Stop reserving register AT and use register scavenger when a scratchAkira Hatanaka
2012-11-02[mips] Fix bug in test case. Disable machine LICM to prevent instruction fromAkira Hatanaka
2012-11-02Vext Lowering was missing opportunitiesQuentin Colombet
2012-11-02[mips] Use register number instead of name to print register $AT.Akira Hatanaka
2012-11-02[mips] Delete MipsFunctionInfo::EmitNOAT. Unconditionally print directiveAkira Hatanaka
2012-11-01test/CodeGen/X86/fp-fast.ll: Add +avx.NAKAMURA Takumi
2012-11-01Add a few more simple fast-math constant propagations and cancellations.Owen Anderson
2012-10-31(For X86) Enhancement to add-carray/sub-borrow (adc/sbb) optimization.Shuxin Yang
2012-10-31[mips] Set isAsCheapAsAMove flag on ADDiu and DADDiu, which enablesAkira Hatanaka
2012-10-31Test case for r167039. Check that tail-call optimization is disabled forAkira Hatanaka
2012-10-31Implement ADJCALLSTACKUP and ADJCALLSTACKDOWNReed Kotler
2012-10-31This patch addresses an ABI compatibility issue with empty aggregateBill Schmidt
2012-10-30X86 SSE: update rsqrtss and rcpss to use two source operands andManman Ren
2012-10-30X86 MMX: optimize transfer from mmx to i32Manman Ren
2012-10-30[mips] Allow tail-call optimization for vararg functions and functions whichAkira Hatanaka
2012-10-30PowerPC: Expand FSRQT for vector typesAdhemerval Zanella
2012-10-30Change ForceSizeOpt attribute into MinSize attributeQuentin Colombet
2012-10-30PowerPC: More support for Altivec compare operationsAdhemerval Zanella
2012-10-30Use TargetTransformInfo to control switch-to-lookup table transformationHans Wennborg
2012-10-30Change mips16 delay slot jumps to non delay slot forms by default.Reed Kotler
2012-10-30Re-commit r166971. I reverted it to quickly, when buildbots didn't have a chanceJakub Staszak
2012-10-29Revert r166971. It causes buildbot failure. To be investigated.Jakub Staszak
2012-10-29llvm/test/CodeGen/X86/vec_shuffle-30.ll: Try to unbreak builds - assuming +avx.NAKAMURA Takumi
2012-10-29Allow to fold vector load if there is more than one bitcast, so in the case:Jakub Staszak
2012-10-29This patch solves a problem with passing varargs parameters under the PPC64Bill Schmidt
2012-10-29Implement patterns for extloadi8 and extloadi16Reed Kotler
2012-10-29In various places throughout the code generator, there were specialUlrich Weigand
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