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2013-05-10DAGCombiner: Generate a correct constant for vector types when folding (xor ↵Benjamin Kramer
(and)) into (and (not)). PR15948. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181597 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-09Teach SelectionDAG to constant fold all-constant FMA nodes the same way that ↵Owen Anderson
it constant folds FADD, FMUL, etc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181555 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-09Generate a compact unwind encoding in the face of a stack alignment push.Bill Wendling
We generate a `push' of a random register (%rax) if the stack needs to be aligned by the size of that register. However, this could mess up compact unwind generation. In particular, we want to still generate compact unwind in the presence of this monstrosity. Check if the push of of the %rax/%eax register. If it is and it's marked with the `FrameSetup' flag, then we can generate a compact unwind encoding for the function only if the push is the last FrameSetup instruction. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181540 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-08Fix a bug in codegenprep where it was losing track of values OptimizeMemoryInstNick Lewycky
by switching to a ValueMap. Patch by Andrea DiBiagio! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181397 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-08DAGCombiner: Simplify inverted bit testsDavid Majnemer
Fold (xor (and x, y), y) -> (and (not x), y) This removes an opportunity for a constant to appear twice. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181395 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Reduce attributes.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181245 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Fix slightly too aggressive conact_vector optimization.Michael Kuperstein
(Would sometimes optimize away conacts used to extend a vector with undef values) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181186 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-06Add a testcase that checks that we generate functions with frameBill Wendling
pointers or not depending upon the function attributes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181180 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-05Remove a recently redundant transform from X86ISelLowering.David Majnemer
X86ISelLowering has support to treat: (icmp ne (and (xor %flags, -1), (shl 1, flag)), 0) as if it were actually: (icmp eq (and %flags, (shl 1, flag)), 0) However, r179386 has code at the InstCombine level to handle this. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181145 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-02TBAA: remove !tbaa from testing cases if not used.Manman Ren
This will make it easier to turn on struct-path aware TBAA since the metadata format will change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180935 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-02Rewrite X86 codegen regression test with FileCheckMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180910 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-01Avoid generating tempfile(s) never usedMichael Liao
As DejaGNU is deprecated, it seems pipe-jam issue doesn't exist any more. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180892 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-01Revert r180737. The companion patch was reverted, and this is not relevant ↵Bill Wendling
right now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180889 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-01Put VMOVPQIto64rr in the VRPDI class.Rafael Espindola
Patch by Joshua Magee. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180842 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-01Forget remove the tempfile argumentMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180838 91177308-0d34-0410-b5e6-96231b3b80d8
2013-05-01More rewrites of x86 codegen regression tests with FileCheckMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180837 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-30Temporarily revert "Change the informal convention of DBG_VALUE so that we ↵Adrian Prantl
can express a" because it breaks some buildbots. This reverts commit 180816. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180819 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-30Change the informal convention of DBG_VALUE so that we can express aAdrian Prantl
register-indirect address with an offset of 0. It used to be that a DBG_VALUE is a register-indirect value if the offset (operand 1) is nonzero. The new convention is that a DBG_VALUE is register-indirect if the first operand is a register and the second operand is an immediate. For plain registers use the combination reg, reg. rdar://problem/13658587 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180816 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-30TBAA: remove !tbaa from testing cases if not used.Manman Ren
This will make it easier to turn on struct-path aware TBAA since the metadata format will change. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180796 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-30Rewrite X86 codegen regression test with FileCheckMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180776 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-30Rewrite test in FileCheck instead of grep in X86 codegenMichael Liao
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180754 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-29Duplicate a testcase.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180744 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-29Rewrite some tests with FileCHeck in X86 codegenMichael Liao
- Revise previous patches of the same purpose by fixing *) grep <PA> | not grep <PB> semantically is not the same as CHECK: <PA>{{^<PB>.*$}} as the former will check all occurrences of <PA> while the later only check the first match. As the result, CHECK needs putting in all place where <PA> occurs. *) grep <PA> | count <N> needs a final CHECK-NOT of the same pattern. (As 'CHECK-<N>' is proposed for discussion, converting 'grep | count <N>' where N > 1 is postponed.) git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180742 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-26Make CHECK lines a bit less strict so they also match code generated for win64.Benjamin Kramer
Hopefully brings the windows buildbots back to life. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180630 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-26X86: Now that we have a canonical form for vector integer abs, match it into ↵Benjamin Kramer
pabs. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180600 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-26DAGCombiner: Canonicalize vector integer abs in the same way we do it for ↵Benjamin Kramer
scalars. This already helps SSE2 x86 a lot because it lacks an efficient way to represent a vector select. The long term goal is to enable the backend to match a canonicalized pattern into a single instruction (e.g. vabs or pabs). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180597 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-25This patch adds the X86FixupLEAs pass, which will reduce instructionPreston Gurd
latency for certain models of the Intel Atom family, by converting instructions into their equivalent LEA instructions, when it is both useful and possible to do so. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180573 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-25[inline asm] Add a test case for r180226. The specific issue is that the inlineChad Rosier
assembly is requesting a 64-bit register, which is invalid for i386. rdar://13731657 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180445 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-23Move test from grep to FileCheck.Rafael Espindola
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180092 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-22Cleanup: test source files do not need to be executableArnaud A. de Grandmaison
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@180003 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-22Revert "Revert "PR14606: debug info imported_module support""David Blaikie
This reverts commit r179840 with a fix to test/DebugInfo/two-cus-from-same-file.ll I'm not sure why that test only failed on ARM & MIPS and not X86 Linux, even though the debug info was clearly invalid on all of them, but this ought to fix it. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179996 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-21Remove tbaa metadata.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179970 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-20Minor renaming of tests (for consistency with an in-development patch)Stephen Lin
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179954 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-20Don't litter .s files in test directory.Benjamin Kramer
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179937 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-20Add CodeGen support for functions that always return arguments via a new ↵Stephen Lin
parameter attribute 'returned', which is taken advantage of in target-independent tail call opportunity detection and in ARM call lowering (when placed on an integral first parameter). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179925 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-20Allow tail call opportunity detection through nested and/or multiple ↵Stephen Lin
iterations of extractelement/insertelement indirection git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179924 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19Do not mangle in MS-way the globals with magic \001 in the name.Anton Korobeynikov
Based on the patch by David Nadlinger! git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179889 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19Make test slightly more readable.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179888 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19Add a testcase to make sure we generate the proper compact unwind section ↵Bill Wendling
for a function that cannot produce a compact unwind encoding. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179887 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19Revert "PR14606: debug info imported_module support"Eric Christopher
This reverts commit r179836 as it seems to have caused test failures. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179840 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-19PR14606: debug info imported_module supportDavid Blaikie
Adding another CU-wide list, in this case of imported_modules (since they should be relatively rare, it seemed better to add a list where each element had a "context" value, rather than add a (usually empty) list to every scope). This takes care of DW_TAG_imported_module, but to fully address PR14606 we'll need to expand this to cover DW_TAG_imported_declaration too. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179836 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18X86: Add an SSE2 lowering for 64 bit compares when pcmpgtq (SSE4.2) isn't ↵Benjamin Kramer
available. This pattern started popping up in vectorized min/max reductions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179797 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-18Allow misaligned stores in x86 fast-isel.Derek Schuff
In X86FastISel::X86SelectStore(), improperly aligned stores are rejected and handled by the DAG-based ISel. However, X86FastISel::X86SelectLoad() makes no such requirement. There doesn't appear to be an x86 architectural correctness issue with allowing potentially unaligned store instructions. This patch removes this restriction. Patch by Jim Stichnot. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179774 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-17This patch teaches x86 fast-isel to generate the native div/idiv instructionsEli Bendersky
for the sdiv/srem/udiv/urem bitcode instructions. This is done for the i8, i16, and i32 types, as well as i64 for the x86_64 target. Patch by Jim Stichnoth git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179715 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-15Avoid outputting temporary test file into source tree.Tim Northover
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179532 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13Further generalize this scheduler test.Andrew Trick
The order of copies depends on queue order, which is not very stable. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179456 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13Fix a dislexic regex.Andrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179455 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13Add a missing REQUIRES: assertsAndrew Trick
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179453 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-13MI-Sched: schedule physreg copies.Andrew Trick
The register allocator expects minimal physreg live ranges. Schedule physreg copies accordingly. This is slightly tricky when they occur in the middle of the scheduling region. For now, this is handled by rescheduling the copy when its associated instruction is scheduled. Eventually we may instead bundle them, but only if we can preserve the bundles as parallel copies during regalloc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179449 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-12Fix the test on linux by setting the triple and the align formatNadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179354 91177308-0d34-0410-b5e6-96231b3b80d8
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