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AgeCommit message (Expand)Author
2011-10-19Improve code generation for vselect on SSE2:Nadav Rotem
2011-10-19Add support for the vector-widening of vselect and vector-setccNadav Rotem
2011-10-19Rename PEXTR to PEXT. Add intrinsics for BMI instructions.Craig Topper
2011-10-18Added testcase for <rdar://problem/10215997>Lang Hames
2011-10-18Add additional element-promotion tests.Nadav Rotem
2011-10-18Fix a bug in the legalization of vector anyext-load and trunc-store. Mem Inde...Nadav Rotem
2011-10-17Add support for a new extension to the .file directive:Nick Lewycky
2011-10-17stabalize tests by specifying the exact sse levelNadav Rotem
2011-10-17Clean the triple, add check lines.Nadav Rotem
2011-10-17Previously v2i32 vectors were legalized to v4i32. Now, they are legalized toNadav Rotem
2011-10-16Add tripple and stabalize a few more tests.Nadav Rotem
2011-10-16Add triple to tests.Nadav Rotem
2011-10-16fix a typo in the testNadav Rotem
2011-10-16Enable element promotion type legalization by deafault.Nadav Rotem
2011-10-14Update live-in lists when splitting critical edges.Jakob Stoklund Olesen
2011-10-14Add X86 ANDN instruction. Including instruction selection.Craig Topper
2011-10-14Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 pro...Craig Topper
2011-10-14Add value numbers when spilling dead defs.Jakob Stoklund Olesen
2011-10-13Force CPU type on test so it doesn't accidentally emit movbe instead of bswap...Benjamin Kramer
2011-10-13More closely follow libgcc, which has code after the `ret' instruction toBill Wendling
2011-10-13Revert r141854 because it was causing failures:Bill Wendling
2011-10-13Should not add instructions to a BB after a return instruction. The machine i...Bill Wendling
2011-10-13Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 pro...Craig Topper
2011-10-12Also inflate register classes around inline asm.Jakob Stoklund Olesen
2011-10-12We need to verify that the machine instruction we're using as a replacement forBill Wendling
2011-10-11Make this test more specific. There are 3 stats that matched "machine-licm".Bob Wilson
2011-10-11Add a new wrapper node for a DILexicalBlock that encapsulates it and aEric Christopher
2011-10-11Add dominance check for the instruction being hoisted.Devang Patel
2011-10-11Add support for legalization of vector SHL/SRA/SRL instructionsNadav Rotem
2011-10-11Test case for X86 LZCNT instruction selection.Craig Topper
2011-10-11test/CodeGen/X86/movbe.ll: Give explicit -mtriple=x86_64-linux, to unbreak wi...NAKAMURA Takumi
2011-10-10Revert r141569 and r141576.Devang Patel
2011-10-10Make sure the X86 backend doesn't explode on 128-bit shuffles in AVX mode. F...Eli Friedman
2011-10-10If loop header is also loop exiting block then it may not be safe to hoist in...Devang Patel
2011-10-10Fix 10892 - When lowering SIGN_EXTEND_INREG do not lower v2i64 because theNadav Rotem
2011-10-10Add dominance check for the instruction being hoisted.Devang Patel
2011-10-10X86: Add patterns for the movbe instruction (mov + bswap, only available on a...Benjamin Kramer
2011-10-08Add TEST8ri_NOREX pseudo to constrain sub_8bit_hi copies.Jakob Stoklund Olesen
2011-10-08Add missing test case for r141410.Jakob Stoklund Olesen
2011-10-07High bits of movmskp{s|d} and pmovmskb are known zero. rdar://10247336Evan Cheng
2011-09-30Filecheck-ize.Bill Wendling
2011-09-30Add new line at end of file.Bill Wendling
2011-09-30When inferring the pointer alignment, if the global doesn't have an initializerBill Wendling
2011-09-29LSR: rewrite inner loops only.Andrew Trick
2011-09-28PR11033: Make sure we don't generate PCMPGTQ and PCMPEQQ if the target CPU do...Eli Friedman
2011-09-27Remove X86-dependent stuff from SSEDomainFix.Jakob Stoklund Olesen
2011-09-27Last batch of test conversions to new atomic instructions.Eli Friedman
2011-09-26Convert a bunch more tests over to the new atomic instructions.Eli Friedman
2011-09-24Only run MF.verify() with EXPENSIVE_CHECKS=1.Jakob Stoklund Olesen
2011-09-23Verify that terminators follow non-terminators.Jakob Stoklund Olesen
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