| Age | Commit message (Expand) | Author |
|---|---|---|
| 2012-09-05 | Use predication instead of pseudo-opcodes when folding into MOVCC. | Jakob Stoklund Olesen |
| 2012-08-16 | Add ADD and SUB to the predicable ARM instructions. | Jakob Stoklund Olesen |
| 2011-12-14 | - Add MachineInstrBundle.h and MachineInstrBundle.cpp. This includes a function | Evan Cheng |
| 2010-11-17 | Remove ARM isel hacks that fold large immediates into a pair of add, sub, and, | Evan Cheng |
| 2010-06-18 | Move ARM if-conversion before post-ra scheduling. | Evan Cheng |
| 2009-11-23 | update test for 89694 | Jim Grosbach |
| 2009-11-17 | Convert to FileCheck | Jim Grosbach |
| 2009-09-09 | Eliminate more uses of llvm-as and llvm-dis. | Dan Gohman |
| 2009-07-10 | Add a thumb2 pass to insert IT blocks. | Evan Cheng |
| 2009-07-08 | Use common code for both ARM and Thumb-2 instruction and register info. | David Goodwin |
| 2009-07-08 | Checkpoint Thumb2 Instr info work. Generalized base code so that it can be sh... | David Goodwin |
| 2009-07-07 | Add Thumb2 movcc instructions. | Evan Cheng |
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