Age | Commit message (Expand) | Author |
2013-05-10 | R600: Remove AMDILPeeopholeOptimizer and replace optimizations with tablegen ... | Tom Stellard |
2013-05-10 | R600: Expand SUB for v2i32/v4i32 | Tom Stellard |
2013-05-10 | R600: Expand MUL for v4i32/v2i32 | Tom Stellard |
2013-05-10 | R600: Expand SRA for v4i32/v2i32 | Tom Stellard |
2013-05-10 | R600: Expand vselect for v4i32 and v2i32 | Tom Stellard |
2013-05-08 | R600/SI: Add lit tests for llvm.SI.imageload and llvm.SI.resinfo intrinsics | Michel Danzer |
2013-05-06 | R600: Emit config values in register / value pairs | Tom Stellard |
2013-05-06 | R600: Stop emitting the instruction type byte before each instruction | Tom Stellard |
2013-05-06 | R600: Emit ISA for CALL_FS_* instructions | Tom Stellard |
2013-05-03 | R600: Expand vector or, shl, srl, and xor nodes | Tom Stellard |
2013-05-03 | R600: Add pattern for SHA-256 Ma function | Tom Stellard |
2013-05-02 | R600: Signed literals are 64bits wide | Vincent Lejeune |
2013-05-02 | R600: If previous bundle is dot4, PV valid chan is always X | Vincent Lejeune |
2013-05-02 | R600: Add a test to check that use_kill is emitted | Vincent Lejeune |
2013-05-02 | R600: Prettier asmPrint of Alu | Vincent Lejeune |
2013-04-30 | TBAA: remove !tbaa from testing cases if not used. | Manman Ren |
2013-04-30 | R600: fix loop-address.ll test | Vincent Lejeune |
2013-04-30 | R600: use native for alu | Vincent Lejeune |
2013-04-30 | R600: Add FetchInst bit to instruction defs to denote vertex/tex instructions | Vincent Lejeune |
2013-04-29 | R600: Use correct CF_END instruction on Northern Island GPUs | Tom Stellard |
2013-04-29 | R600: Fix encoding of CF_END_{EG, R600} instructions | Tom Stellard |
2013-04-26 | R600: Initialize AMDGPUMachineFunction::ShaderType to ShaderType::COMPUTE | Tom Stellard |
2013-04-24 | R600: Use SHT_PROGBITS for the .AMDGPU.config section | Tom Stellard |
2013-04-23 | R600: Use .AMDGPU.config section to emit stacksize | Vincent Lejeune |
2013-04-23 | R600: Add CF_END | Vincent Lejeune |
2013-04-19 | R600: Add pattern for the BFI_INT instruction | Tom Stellard |
2013-04-19 | R600: Reorganize lit tests and document how they should be organized | Tom Stellard |
2013-04-17 | R600: Make Export Instruction not duplicable | Vincent Lejeune |
2013-04-15 | R600/SI: Emit config values in register value pairs. | Tom Stellard |
2013-04-15 | R600/SI: Emit configuration value in the .AMDGPU.config ELF section | Tom Stellard |
2013-04-15 | R600: Emit ELF formatted code rather than raw ISA. | Tom Stellard |
2013-04-10 | R600/SI: Add pattern for AMDGPUurecip | Michel Danzer |
2013-04-10 | R600: Add VTX_READ_* and RAT_WRITE_CACHELESS_* when computing cf addr | Vincent Lejeune |
2013-04-10 | R600/SI: dynamical figure out the reg class of MIMG | Christian Konig |
2013-04-10 | R600/SI: adjust writemask to only the used components | Christian Konig |
2013-04-10 | R600/SI: remove image sample writemask | Christian Konig |
2013-04-05 | R600/SI: Add support for buffer stores v2 | Tom Stellard |
2013-04-05 | R600/SI: Add processor types for each SI variant | Tom Stellard |
2013-04-05 | R600/SI: Avoid generating S_MOVs with 64-bit immediates v2 | Tom Stellard |
2013-04-04 | R600: Take export into account when computing cf address | Vincent Lejeune |
2013-04-03 | R600: Fix last ALU of a clause being emitted in a separate clause | Vincent Lejeune |
2013-04-01 | R600: Add support for native control flow | Vincent Lejeune |
2013-04-01 | R600: Emit CF_ALU and use true kcache register. | Vincent Lejeune |
2013-03-27 | R600/SI: add SETO/SETUO patterns | Christian Konig |
2013-03-27 | R600/SI: add cummuting of rev instructions | Christian Konig |
2013-03-27 | R600/SI: add mulhu/mulhs patterns | Christian Konig |
2013-03-27 | R600/SI: add srl/sha patterns for SI | Christian Konig |
2013-03-26 | R600/SI: mark most intrinsics as readnone v2 | Christian Konig |
2013-03-22 | R600: Fix up test/CodeGen/R600/llvm.pow.ll for r177730 | Michel Danzer |
2013-03-14 | R600: Factorize code handling Const Read Port limitation | Vincent Lejeune |