| Age | Commit message (Expand) | Author |
|---|
| 2011-04-12 | Revert 129383. It causes some targets to hit a scheduler assert. | Andrew Trick |
| 2011-04-12 | PreRA scheduler heuristic fixes: VRegCycle, TokenFactor latency. | Andrew Trick |
| 2011-04-12 | Split a store of a VMOVDRR into two integer stores to avoid mixing NEON and ARM | Cameron Zwarich |
| 2011-04-11 | Look pass copies when determining whether hoisting would end up inserting mor... | Evan Cheng |
| 2011-04-09 | remove a bunch of CHECK lines that aren't checking what | Chris Lattner |
| 2011-04-09 | don't test for codegen of 'store undef' | Chris Lattner |
| 2011-04-08 | Change -arm-trap-func= into a non-arm specific option. Now Intrinsic::trap is... | Evan Cheng |
| 2011-04-07 | Add option to emit @llvm.trap as a function call instead of a trap instructio... | Evan Cheng |
| 2011-04-07 | Added a check in the preRA scheduler for potential interference on a | Andrew Trick |
| 2011-04-07 | Prevent ARM DAG Combiner from doing an AND or OR combine on an illegal vector... | Tanya Lattner |
| 2011-04-07 | Change -arm-divmod-libcall to a target neutral option. | Evan Cheng |
| 2011-04-06 | Teach the ARM peephole optimizer that RSB, RSC, ADC, and SBC can be used for ... | Owen Anderson |
| 2011-04-05 | These tests no longer require linear scan because reserved register coalescin... | Jakob Stoklund Olesen |
| 2011-04-05 | Fix test-llvm failures. | Johnny Chen |
| 2011-04-05 | Fix up testcase for previous commit. | Eric Christopher |
| 2011-04-02 | Do some peephole optimizations to remove pointless VMOVs from Neon to integer | Cameron Zwarich |
| 2011-04-01 | LDRD/STRD instructions should print both Rt and Rt2 in the asm string. | Jim Grosbach |
| 2011-04-01 | Add test case. | Evan Cheng |
| 2011-04-01 | FileCheck'ify test. | Evan Cheng |
| 2011-03-31 | Fix ARM tests to be register allocator independent. | Jakob Stoklund Olesen |
| 2011-03-31 | Distribute (A + B) * C to (A * C) + (B * C) to make use of NEON multiplier | Evan Cheng |
| 2011-03-31 | Pick a conservative register class when creating a small live range for remat. | Jakob Stoklund Olesen |
| 2011-03-30 | Add a ARM-specific SD node for VBSL so that forms with a constant first operand | Cameron Zwarich |
| 2011-03-29 | Add intrinsics @llvm.arm.neon.vmulls and @llvm.arm.neon.vmullu.* back. Frontends | Evan Cheng |
| 2011-03-29 | Add Neon SINT_TO_FP and UINT_TO_FP lowering from v4i16 to v4f32. Fixes | Cameron Zwarich |
| 2011-03-29 | Optimizing (zext A + zext B) * C, to (VMULL A, C) + (VMULL B, C) during ... | Evan Cheng |
| 2011-03-23 | Enable GlobalMerge on darwin. | Devang Patel |
| 2011-03-23 | Cmp peephole optimization isn't always safe for signed arithmetics. | Evan Cheng |
| 2011-03-20 | Write the section table and the section data in the same order that | Rafael Espindola |
| 2011-03-18 | Match a few more obvious patterns to revsh. rdar://9147637. | Evan Cheng |
| 2011-03-16 | Revert r127757, "Patch to a fix dwarf relocation problem on ARM. One-line fix | Daniel Dunbar |
| 2011-03-16 | Patch to a fix dwarf relocation problem on ARM. One-line fix plus the test wh... | Renato Golin |
| 2011-03-15 | Some minor cleanups based on feedback. | Bill Wendling |
| 2011-03-15 | Do not form thumb2 ldrd / strd if the offset is by multiple of 4. rdar://9133587 | Evan Cheng |
| 2011-03-15 | Add a peephole optimization to optimize pairs of bitcasts. e.g. | Evan Cheng |
| 2011-03-15 | Testcase for r127630. | Bill Wendling |
| 2011-03-15 | Clean up ARM tail calls a bit. They're pseudo-instructions for normal branches. | Jim Grosbach |
| 2011-03-14 | Generate a VTBL instruction instead of a series of loads and stores when we | Bill Wendling |
| 2011-03-14 | Fix this test up a bit. | Eric Christopher |
| 2011-03-14 | Minor optimization. sign-ext/anyext of undef is still undef. | Evan Cheng |
| 2011-03-12 | Saving files before committing is overrated. | Eric Christopher |
| 2011-03-12 | Sometimes isPredicable lies to us and tells us we don't need the operands. | Eric Christopher |
| 2011-03-11 | Properly pseudo-ize the ARM LDMIA_RET instruction. This has the nice side- | Jim Grosbach |
| 2011-03-11 | Roll r127459 back in: | Cameron Zwarich |
| 2011-03-11 | Revert r127459, "Optimize trivial branches in CodeGenPrepare, which often get | Daniel Dunbar |
| 2011-03-11 | Optimize trivial branches in CodeGenPrepare, which often get created from the | Cameron Zwarich |
| 2011-03-11 | Avoid replacing the value of a directly stored load with the stored value if ... | Evan Cheng |
| 2011-03-10 | Properly pseudo-ize MOVCCr and MOVCCs. | Jim Grosbach |
| 2011-03-08 | Fix a compiler crash where a Glue value had multiple uses. Radar 9049552. | Bob Wilson |
| 2011-03-04 | Be nice to Xcore and the XMOS assembler and avoid quoting section names | Joerg Sonnenberger |
