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AgeCommit message (Expand)Author
2012-10-30X86 SSE: update rsqrtss and rcpss to use two source operands andManman Ren
2012-10-30X86 MMX: optimize transfer from mmx to i32Manman Ren
2012-10-30[mips] Allow tail-call optimization for vararg functions and functions whichAkira Hatanaka
2012-10-30Add code for saving formal argument information to MipsFunctionInfo. ThisAkira Hatanaka
2012-10-30Add definition of function MipsTargetLowering::passArgOnStack which emits nodesAkira Hatanaka
2012-10-30Do not do tail-call optimization if target is mips16.Akira Hatanaka
2012-10-30PowerPC: Expand FSRQT for vector typesAdhemerval Zanella
2012-10-30Enable ELF machine type to be specified explicitly in X86 backendMichael Liao
2012-10-30Change ForceSizeOpt attribute into MinSize attributeQuentin Colombet
2012-10-30PowerPC: More support for Altivec compare operationsAdhemerval Zanella
2012-10-30Use TargetTransformInfo to control switch-to-lookup table transformationHans Wennborg
2012-10-30Remove an invalid assert in TargetTransformImplHal Finkel
2012-10-30ARM: Better disassembly for pc-relative LDR.Jim Grosbach
2012-10-30Change mips16 delay slot jumps to non delay slot forms by default.Reed Kotler
2012-10-30Re-commit r166971. I reverted it to quickly, when buildbots didn't have a chanceJakub Staszak
2012-10-29Fix ARM's b.w instruction for thumb 2 and the encoding T4. The branch targetKevin Enderby
2012-10-29Revert r166971. It causes buildbot failure. To be investigated.Jakub Staszak
2012-10-29Remove unused variable.Jakub Staszak
2012-10-29Simplify code. No functionality change.Jakub Staszak
2012-10-29Allow to fold vector load if there is more than one bitcast, so in the case:Jakub Staszak
2012-10-29This patch solves a problem with passing varargs parameters under the PPC64Bill Schmidt
2012-10-29Implement patterns for extloadi8 and extloadi16Reed Kotler
2012-10-29[ms-inline asm] Add support for the [] operator. Essentially, [expr1][expr2] isChad Rosier
2012-10-29Fix PR14204Michael Liao
2012-10-29Fix typoJoerg Sonnenberger
2012-10-29Allow i32/i64 for 'f' constraint on PowerPC.Ulrich Weigand
2012-10-29Minor style fixes for TargetTransformationInfo and TargetTransformImplHans Wennborg
2012-10-29Expand all atomic ops for mips16.Reed Kotler
2012-10-29PPCSubtarget.h: Add explicit braces.NAKAMURA Takumi
2012-10-29PPCSubtarget.h: Whitespace.NAKAMURA Takumi
2012-10-29This patch adds alignment information for long double to the 64-bit PowerPCBill Schmidt
2012-10-29Silence a GCC warning about comparing signed and unsigned types.Duncan Sands
2012-10-29Calling TLI->getNumRegisters creates a circular dependency when building LLVM...Nadav Rotem
2012-10-28Implement brind operator for mips16.Reed Kotler
2012-10-28Remove TargetELFWriterInfo.Rafael Espindola
2012-10-28This patch is for the implementation of mips16 complex pattern addr16.Reed Kotler
2012-10-27[code size][ARM] Emit regular call instructions instead of the move, branch s...Quentin Colombet
2012-10-27Implement MipsHi for mips16Reed Kotler
2012-10-27[mips] Do not tail-call optimize vararg functions or functions with byvalAkira Hatanaka
2012-10-27[mips] Make sure FuncArg doesn't advance when OrigArgIndex is the same as in theAkira Hatanaka
2012-10-27Use the methods and classes that were added to simplify LowerCall and Akira Hatanaka
2012-10-27Add method MipsTargetLowering::writeVarArgRegs which copies argument registersAkira Hatanaka
2012-10-27Add method MipsTargetLowering::passByValArg.Akira Hatanaka
2012-10-27Add method MipsTargetLowering::copyByValRegs.Akira Hatanaka
2012-10-26Add class MipsCC which provides methods used to analyze formal and callAkira Hatanaka
2012-10-26Delete MipsFunctionInfo::InArgFIRange. Akira Hatanaka
2012-10-26Refactor the VectorTargetTransformInfo interface.Nadav Rotem
2012-10-26Revert r163298 "Optimize codegen for VSETLNi{8,16,32} operating on Q registers."Jakob Stoklund Olesen
2012-10-26Avoid an unused-variable warning when asserts are disabled.Kaelyn Uhrain
2012-10-26implement mips16 tls global addrReed Kotler