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AgeCommit message (Expand)Author
2012-11-15Mark FP_ROUND for converting NEON v2f64 to v2f32 as expand. Add a missingEli Friedman
2012-11-15[mips] Add predicate HasFPIdx for floating-point indexed load instructionAkira Hatanaka
2012-11-15PowerPC: Lowering floor intrinsic for AltivecAdhemerval Zanella
2012-11-15Add assertions in MipsLongBranch which check the size of basic blocks.Akira Hatanaka
2012-11-15Return 0 instead of false.Jakub Staszak
2012-11-15Simplify code.Jakub Staszak
2012-11-15Use empty parens for empty function parameter list instead of '(void)'.Dmitri Gribenko
2012-11-15Revert changing FNEG of v4f32 to Expand. It's legal.Craig Topper
2012-11-15Make FNEG and FABS of v4f32 Expand.Craig Topper
2012-11-15Make a bunch of floating point operations on vectors Expand so that instructi...Craig Topper
2012-11-15Add llvm.ceil, llvm.trunc, llvm.rint, llvm.nearbyint intrinsics.Craig Topper
2012-11-14Remove unneeded #includes.Jakub Staszak
2012-11-14NVPTXISelLowering.cpp: Fix warnings. [-Wunused-variable]NAKAMURA Takumi
2012-11-14Remove the CellSPU port.Eric Christopher
2012-11-14Fix invalid asserts, use llvm_unreachable instead.Jakub Staszak
2012-11-14Added multiclass for post-increment load instructions.Jyotsna Verma
2012-11-14X86: Enable SSE memory intrinsics even when stack alignment is less than 16 b...Benjamin Kramer
2012-11-14The code pattern "imm0_255_neg" is used for checking if an immediate value is...Nadav Rotem
2012-11-14[NVPTX] Implement custom lowering of loads/stores for i1Justin Holewinski
2012-11-14X86: Better diagnostics for 32-bit vs. 64-bit mode mismatches.Jim Grosbach
2012-11-14Set FFLOOR of vectors to expand to keep intruction selection from failing.Craig Topper
2012-11-14Factor out an overly replicated typecast. No functional change.Craig Topper
2012-11-14Set FFLOOR for vectors to expand on CellSPU to keep instruction selection fro...Craig Topper
2012-11-14Use TARGET2 relocation for TType references on ARM.Anton Korobeynikov
2012-11-13Add (some) PowerPC TLS relocation types to ELF.h andUlrich Weigand
2012-11-13Fix wrong PowerPC instruction opcodes for:Ulrich Weigand
2012-11-13Fix wrong PowerPC instruction encodings due toUlrich Weigand
2012-11-13Fix instruction encoding for "bd(n)z" on PowerPC,Ulrich Weigand
2012-11-13Fix instruction encoding for "isel" on PowerPC,Ulrich Weigand
2012-11-13X86: when constructing VZEXT_LOAD from other loads, makes sure its outputManman Ren
2012-11-13misched: Allow subtargets to enable misched and dependent options.Andrew Trick
2012-11-13Test commit.Jyotsna Verma
2012-11-12misched: Target-independent support for load/store clustering.Andrew Trick
2012-11-12Make TOC order deterministic by using MapVector instead of DenseMap.Ulrich Weigand
2012-11-12Remove unused field.Eric Christopher
2012-11-12Fix PR14314Michael Liao
2012-11-12[NVPTX] Add more precise PTX/SM target attributesJustin Holewinski
2012-11-11Move some helper methods to being static functions in the implementation file.Craig Topper
2012-11-11Use the isTruncFree and isZExtFree API to figure out of these operations are ...Nadav Rotem
2012-11-10Remove unnecessary subtraction and addition by 1 around a couple for loops.Craig Topper
2012-11-10Tidy up spacing. No functional change.Craig Topper
2012-11-10Removed unimplemented method declaration.Craig Topper
2012-11-10Simplify custom emitter code for pcmp(e/i)str(i/m) and make the helper functi...Craig Topper
2012-11-10Add more functions to the target library information.Meador Inge
2012-11-10Disable the Thumb no-return call optimization:Evan Cheng
2012-11-10Cleanup pcmp(e/i)str(m/i) instruction definitions and load folding support.Craig Topper
2012-11-09[NVPTX] Use ABI alignment for parameters when alignment is not specified.Justin Holewinski
2012-11-09Add ARM TARGET2 relocation. The testcase will follow with actualy use-case.Anton Korobeynikov
2012-11-09Switch FreeBSD/i386 back to 4byte stack alignment. This partiallyRoman Divacky
2012-11-09Revert r167620; this can be implemented using an existing CL option.Chad Rosier
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