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2012-12-30Use the predicate methods off of AttributeSet instead of Attribute.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171257 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-30Remove the Function::getRetAttributes method in favor of using the ↵Bill Wendling
AttributeSet accessor method. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171256 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-30Remove Function::getParamAttributes and use the AttributeSet accessor ↵Bill Wendling
methods instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171255 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-30Remove the Function::getFnAttributes method in favor of using the AttributeSetBill Wendling
directly. This is in preparation for removing the use of the 'Attribute' class as a collection of attributes. That will shift to the AttributeSet class instead. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171253 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-30s/hasAttribute/contains/g to be more consistent with other method names.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171252 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-29Remove intrinsic specific instructions for (V)SQRTPS/PD. Instead lower to ↵Craig Topper
target-independent ISD nodes and use the existing patterns for those. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171237 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-29Merge similar functionality using a nested switch.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171229 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-29Remove intrinsic specific instructions for SSE/SSE2/AVX floating point ↵Craig Topper
max/min instructions. Lower them to target specific nodes and use those patterns instead. This also allows them to be commuted if UnsafeFPMath is enabled. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171227 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-29Simplify code, no functionality change.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171226 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-29Delete executive bit on ./lib/Target/Hexagon/HexagonAsmPrinter.h.Jakub Staszak
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171225 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-28CostModel: initial checkin for code that estimates the cost of special shuffles.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171180 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-28wrap 80-col lines.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171179 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-28AVX: Move the ZEXT/ANYEXT DAGCo optimizations to the lowering of these ↵Nadav Rotem
optimizations. The old test cases still cover all of these lowering/optimizations. The single change that we have is that now anyext does not need to zero a register, because it does not use the exact code path as the zero_extend. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171178 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27Reverse the 'if' condition and reduce the indentation.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171172 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27Merge basic_sse12_fp_binop_p_int and basic_sse12_fp_binop_p_y_int multiclasses.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171171 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27AVX/AVX2: Move the SEXT lowering code from a target specific DAGco to a ↵Nadav Rotem
lowering function. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171170 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27Merge basic_sse12_fp_binop_p and basic_sse12_fp_binop_p_y multiclasses.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171166 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27On AVX/AVX2 the type v8i1 is legalized to v8i16, which is an XMM sizedNadav Rotem
register. In most cases we actually compare or select YMM-sized registers and mixing the two types creates horrible code. This commit optimizes some of the transition sequences. PR14657. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171148 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27AVX/AVX2: Move the code that lowers vector-trunc from a DAGCo-hook to custom ↵Nadav Rotem
lowering hook. The vector truncs were scalarized during LegalizeVectorOps, later vectorized again by some DAGCombine optimization and finally, lowered by a dagcombing optimization. Now, they are properly lowered during LegalizeVectorOps. No new testcase because the original testcases still work. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171146 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27Add hasSideEffects=0 to some forms of ROUND, RCP, and RSQRT.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171143 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27Move single letter 'P' prefix out of multiclass now that tablegen allows ↵Craig Topper
defm to start with #NAME. This makes instruction names more searchable again. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171141 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27Add hasSideEffects=0 to some shift and rotate instructions. None of which ↵Craig Topper
are currently used by code generation. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171137 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27Mark the divide instructions as hasSideEffects=0.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171136 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27Add hasSideEffects=0 to CMP*rr_REV.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171130 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-27Add mayLoad, mayStore, and hasSideEffects tags to BT/BTS/BTR/BTC ↵Craig Topper
instructions. Shouldn't change any functionality since they don't have patterns to select them. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171128 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Fix operands and encoding form for ARPL instruction. Register form had and ↵Craig Topper
reversed. Memory form writes memory, but was marked as MRMSrcMem. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171123 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Add hasSideEffects=0 to some atomic instructions.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171122 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Mark the AL/AX/EAX forms of the basic arithmetic operations has never having ↵Craig Topper
side effects. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171121 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Mark all the _REV instructions as not having side effects. They aren't ↵Craig Topper
really emitted by the backend, but it reduces the number of instructions in the output files with unmodelled side effects to make auditing easier. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171118 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Remove a special conditional setting of neverHasSideEffects if the ↵Craig Topper
instruction didn't have a pattern. This was leftover from when tablegen used to complain if things were already inferred from patterns. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171117 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Merge still more SSE/AVX instruction definitions.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171103 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Merge more SSE/AVX instruction definitions.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171102 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Fix 80 column violation.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171097 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Fix class name in comment.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171096 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Merge SSE/AVX PCMPEQ/PCMPGT instruction definitions.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171095 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Remove 'v' from mnemonic to fix asm matching failures.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171093 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Use an additional multiclass to merge the 128/256-bit SSE/AVX instruction ↵Craig Topper
definitions for a bunch of SSE2 integer arithmetic instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171092 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Reformat the docs.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171091 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Use an additional multiclass to merge the 128/256-bit SSE/AVX instruction ↵Craig Topper
definitions for PAND/POR/PXOR/PANDN git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171087 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Merge an AVX/SSE 256-bit and 128-bit multiclass.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171086 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Mark VANDNPD/VANDNPDS as not commutable.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171085 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Remove alignment from a bunch more VEX encoded operations in the folding tables.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171082 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Remove alignment from folding table for VMOVUPD as an unaligned instruction ↵Craig Topper
it shouldn't require alignment... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171081 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Remove alignment requirements from (V)EXTRACTPS. This instruction does ↵Craig Topper
32-bit stores which aren't required to be aligned on SSE or AVX. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171080 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-26Remove alignment requirement from VCVTSS2SD in folding tables. Reverting ↵Craig Topper
r171049. This instruction doesn't require alignment. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171078 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25Expand PPC64 atomic load and storeHal Finkel
Use of store or load with the atomic specifier on 64-bit types would cause instruction-selection failures. As with the 32-bit case, these can use the default expansion in terms of cmp-and-swap. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171072 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25X86: Shave off one shuffle from the pcmpeqq sequence for SSE2 by making use ↵Benjamin Kramer
of and commutativity. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171064 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25X86: Custom lower <2 x i64> eq and ne when SSE41 is not available.Benjamin Kramer
pcmpeqd, pshufd, pshufd, pand is cheaper than unpack + cmpq, sbbq, cmpq, sbbq + pack. Small speedup on loop-vectorized viterbi (-march=core2). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171063 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-25VCVTSS2SD requires a strict alignment. Thanks Elena.Nadav Rotem
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171049 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-24Quiet gcc's -Wparenthesis warning. No functionality change.Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171044 91177308-0d34-0410-b5e6-96231b3b80d8
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