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AgeCommit message (Expand)Author
2012-07-23Add comment for relocations MO_HIGHER and HIGHEST in MipsBaseInfo.h.Akira Hatanaka
2012-07-23Test revert of test changes.Micah Villmow
2012-07-23Test commit.Micah Villmow
2012-07-23Fix a typo (the the => the)Sylvestre Ledru
2012-07-21Fix Mips long branch pass.Akira Hatanaka
2012-07-21Add HIGHER and HIGHEST relocations to Mips backend.Akira Hatanaka
2012-07-21Revert accidental commit.Akira Hatanaka
2012-07-21Add VK_Mips_HIGHER and VK_Mips_HIGHEST to MCSymbolRefExpr::VariantKind.Akira Hatanaka
2012-07-20Don't use implicit register operands to calculate L-bit for AVX instructions....Craig Topper
2012-07-19Adds the family codes for the Midview Atom processors so that thePreston Gurd
2012-07-19default to use -mv4 when no version of Hexagon has been specifiedSebastian Pop
2012-07-19[arm-fast-isel] Add support for vararg function calls.Jush Lu
2012-07-19Remove tabs.Bill Wendling
2012-07-19Remove tabs.Bill Wendling
2012-07-19Remove tabs.Bill Wendling
2012-07-19Remove tabs.Bill Wendling
2012-07-18X86: remove redundant cmp against zero.Manman Ren
2012-07-18This patch fixes 8 out of 20 unexpected failures in "make check"Preston Gurd
2012-07-18Fix ARMTargetLowering::isLegalAddImmediate to consider thumb encodings.Andrew Trick
2012-07-18whitespaceAndrew Trick
2012-07-18The vbroadcast family of instructions has 'fallback patterns' in case where theNadav Rotem
2012-07-18Mips specific inline asm operand modifier 'M':Jack Carter
2012-07-18Remove tab characters.Craig Topper
2012-07-18Fix typo in error message and remove some tab characters.Craig Topper
2012-07-18Make x86 asm parser to check for xmm vs ymm for index register in gather inst...Craig Topper
2012-07-18More replacing of target-dependent intrinsics with target-indepdent Joel Jones
2012-07-17Clean up Mips16InstrFormats.td and Mips16InstrInfo.td.Akira Hatanaka
2012-07-17Back out r160101 and instead implement a dag combine to recover from instcomb...Evan Cheng
2012-07-17Implement r160312 as target indepedenet dag combine.Evan Cheng
2012-07-17This is another case where instcombine demanded bits optimization createdEvan Cheng
2012-07-16For something likeEvan Cheng
2012-07-16Revert "AMDGPU: Add core backend files for R600/SI codegen v6"Tom Stellard
2012-07-16Revert "Build script changes for R600/SI Codegen v6"Tom Stellard
2012-07-16Revert "Target/AMDGPU/R600KernelParameters.cpp: Fix two includes, <llvm/IRBui...Tom Stellard
2012-07-16Revert "Target/AMDGPU: [CMake] Fix dependencies. 1) Add intrinsics_gen. Add A...Tom Stellard
2012-07-16Revert "Target/AMDGPU/R600KernelParameters.cpp: Don't use "and", "or" as cond...Tom Stellard
2012-07-16Revert "Target/AMDGPU/AMDILIntrinsicInfo.cpp: Use llvm_unreachable() in nonre...Tom Stellard
2012-07-16Revert "Target/AMDGPU: Fix includes, or msvc build failed."Tom Stellard
2012-07-16With r160248 in place this code is no longer needed.Chad Rosier
2012-07-16Target/AMDGPU: Fix includes, or msvc build failed.NAKAMURA Takumi
2012-07-16Target/AMDGPU/AMDILIntrinsicInfo.cpp: Use llvm_unreachable() in nonreturn fun...NAKAMURA Takumi
2012-07-16Target/AMDGPU/R600KernelParameters.cpp: Don't use "and", "or" as conditional ...NAKAMURA Takumi
2012-07-16Doubleword Shift Left Logical Plus 32Jack Carter
2012-07-16Target/AMDGPU: [CMake] Fix dependencies. 1) Add intrinsics_gen. Add AMDGPUCom...NAKAMURA Takumi
2012-07-16Target/AMDGPU/R600KernelParameters.cpp: Fix two includes, <llvm/IRBuilder.h> ...NAKAMURA Takumi
2012-07-16Build script changes for R600/SI Codegen v6Tom Stellard
2012-07-16AMDGPU: Add core backend files for R600/SI codegen v6Tom Stellard
2012-07-16Fix a bug in the 3-address conversion of LEA when one of the operands is anNadav Rotem
2012-07-16This CL changes the function prologue and epilogue emitted on X86 when stack ...Alexey Samsonov
2012-07-15Teach getTargetVShiftNode about TargetConstant nodes.Nadav Rotem
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