aboutsummaryrefslogtreecommitdiff
path: root/lib/Target
AgeCommit message (Collapse)Author
2011-11-07Merging r143712:Bill Wendling
------------------------------------------------------------------------ r143712 | efriedma | 2011-11-04 10:29:35 -0700 (Fri, 04 Nov 2011) | 3 lines Add missing argument for atomic instructions in c++ backend. PR11268, part 2. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_30@143999 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-07Merging r143406:Bill Wendling
------------------------------------------------------------------------ r143406 | efriedma | 2011-10-31 16:59:22 -0700 (Mon, 31 Oct 2011) | 3 lines Add support for new atomics to cpp backend. Misc other fixes while I'm here. PR11268. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_30@143998 91177308-0d34-0410-b5e6-96231b3b80d8
2011-11-01Merging r143290:Bill Wendling
------------------------------------------------------------------------ r143290 | d0k | 2011-10-29 12:43:38 -0700 (Sat, 29 Oct 2011) | 3 lines PPC: Disable moves for all CR subregisters. Should fix assertion failures on ppc buildbots. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_30@143451 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-26Complete the missing parts of MIPS-JIT functionality. Patch by Petar Jovanovic.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_30@143014 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-24Merging r142841:Bill Wendling
------------------------------------------------------------------------ r142841 | efriedma | 2011-10-24 13:24:21 -0700 (Mon, 24 Oct 2011) | 3 lines Add support to the old JIT for acquire/release loads and stores on x86. PR11207. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_30@142842 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-24In LLVM 2.9, the GHC calling convention is only supported on x86-32,Bill Wendling
x86-64. We (GHC team) would like this patch included as we've recently added support to GHC for the ARM platform. Patch by David Terei! git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_30@142820 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-24Merging r142801:Bill Wendling
------------------------------------------------------------------------ r142801 | grosbach | 2011-10-24 10:16:24 -0700 (Mon, 24 Oct 2011) | 4 lines Thumb2 LDM instructions can target PC. Make sure to encode it. PR11220 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_30@142808 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-20Merging r142350:Bill Wendling
------------------------------------------------------------------------ r142350 | baldrick | 2011-10-18 05:44:00 -0700 (Tue, 18 Oct 2011) | 3 lines Fix a bunch of unused variable warnings when doing a release build with gcc-4.6. ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_30@142609 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-19Merging r142550:Bill Wendling
------------------------------------------------------------------------ r142550 | evancheng | 2011-10-19 15:22:54 -0700 (Wed, 19 Oct 2011) | 1 line Fix TLS lowering bug. The CopyFromReg must be glued to the TLSCALL. rdar://10291355 ------------------------------------------------------------------------ git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_30@142555 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-15Mark tADDrSPi as having side effects again.Jakob Stoklund Olesen
It really doesn't, but when r141929 removed the hasSideEffects flag from this instruction, it caused miscompilations. I am guessing that it got moved across a stack pointer update. Also clear isRematerializable after checking that this instruction is in fact never rematerialized in the nightly test suite. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142030 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-15Thumb1 does not support dynamic stack realignment.Chad Rosier
rdar://10288916 is tracking this fix. In the past, instcombine and other passes were promoting alloca alignment past the natural alignment, resulting in dynamic stack realignment. Lang's work now prevents this from happening (LLVM commit r141599). Now that this really shouldn't happen report a fatal error rather than silently generate bad code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142028 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-15Mark registers as DEAD because they're really just clobbers.Bill Wendling
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142027 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14Add missing correctness check to ARMTargetLowering::ReconstructShuffle. ↵Eli Friedman
Fixes PR11129. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142022 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14Make sure that the register is in the register class before adding it as a ↵Bill Wendling
machine op. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142021 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14Mark the invoke call instruction as implicitly defining the callee-saved ↵Bill Wendling
registers. The callee-saved registers cannot be live across an invoke call because the control flow may continue along the exceptional edge. When this happens, all of the callee-saved registers are no longer valid. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142018 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14Fix a non-firing assert. Change:Richard Trieu
assert("bad SymbolicOp.VariantKind"); To: assert(0 && "bad SymbolicOp.VariantKind"); git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@142000 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14A few 80-col violations.Evan Cheng
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141988 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14Add an implementation of the CanLowerReturn function to the PPC backendHal Finkel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141981 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14Add f128 to datalayout string.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141978 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14initial test commit (remove whitespace)Hal Finkel
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141972 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14Revert r141932, r141936 and r141937.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141959 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14Add X86 ANDN instruction. Including instruction selection.Craig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141947 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 ↵Craig Topper
processor which is gcc's name for Haswell. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141939 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14Definition of function getMipsRegisterNumbering.Akira Hatanaka
Patch by Jack Carter and Reed Kotler at Mips. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141938 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14Add definition of class MipsELFWriterInfo. Akira Hatanaka
Patch by Jack Carter and Reed Kotler at Mips. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141937 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14Add missing relocation types.Akira Hatanaka
Patch by Jack Carter and Reed Kotler at Mips. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141936 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14Fixup enumerations.Akira Hatanaka
Patch by Jack Carter at Mips. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141934 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14Add more Mips relocation types.Akira Hatanaka
Patch by Jack Carter at Mips. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141932 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14Ban rematerializable instructions with side effects.Jakob Stoklund Olesen
TableGen infers unmodeled side effects on instructions without a pattern. Fix some instruction definitions where that was overlooked. Also raise an error if a rematerializable instruction has unmodeled side effects. That doen't make any sense. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141929 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-14V_SET0 has no side effects.Jakob Stoklund Olesen
TableGen will mark any pattern-less instruction as having unmodeled side effects. This is extra bad for V_SET0 which gets rematerialized a lot. This was part of the cause for PR11125, but the real bug was fixed in r141923. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141924 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-13Fix undefined shift. Patch by Ahmed Charles.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141914 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-13Simplify assertion, and avoid undefined shift. Based on patch by Ahmed Charles.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141912 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-13Fix undefined shifts and abs in Alpha backend. Based on patch by Ahmed Charles.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141909 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-13Simplify and avoid undefined shift. Based on patch by Ahmed Charles.Eli Friedman
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141903 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-13SETEND is not allowed in an IT block.Owen Anderson
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141874 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-13Mark 'branch indirect' instruction as an indirect branch.Kalle Raiskila
Not having it confused assembly printing of jumptables. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141862 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-13More closely follow libgcc, which has code after the `ret' instruction toBill Wendling
release the stack segment and reset the stack pointer. Place the code in its own MBB to make the verifier happy. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141859 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-13Revert r141854 because it was causing failures:Bill Wendling
http://lab.llvm.org:8011/builders/llvm-x86_64-linux/builds/101 --- Reverse-merging r141854 into '.': U test/MC/Disassembler/X86/x86-32.txt U test/MC/Disassembler/X86/simple-tests.txt D test/CodeGen/X86/bmi.ll U lib/Target/X86/X86InstrInfo.td U lib/Target/X86/X86ISelLowering.cpp U lib/Target/X86/X86.td U lib/Target/X86/X86Subtarget.h git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141857 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-13Should not add instructions to a BB after a return instruction. The machine ↵Bill Wendling
instruction verifier doesn't like this, nor do I. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141856 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-13Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 ↵Craig Topper
processor which is gcc's name for Haswell. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141854 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-13Add 'implicit EFLAGS' to patterns for popcnt and lzcntCraig Topper
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141853 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12ARM addrmode5 represents the 'U' bit of the encoding backwards.Jim Grosbach
The disassembler needs to use the AM5 factory methods instead of just building up the immediate directly. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141819 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12Thumb2 assembly parsing and encoding for LDC/STC.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141811 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12addrmode2 is gone from these, so no need for the reg0 operand.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141794 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12ARM parsing and encoding for the <option> form of LDC/STC instructions.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141786 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-1280 columns.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141781 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12Tidy up. Formatting.Jim Grosbach
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141780 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12Define base class LogicNOR and make 32-bit and 64-bit NOR derive from it.Akira Hatanaka
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141761 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12Fix encoding of 32-bit integer instructions. Change names of operands and nodes.Akira Hatanaka
Remove unused classes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141757 91177308-0d34-0410-b5e6-96231b3b80d8
2011-10-12Fix indent in comment.Nick Lewycky
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141749 91177308-0d34-0410-b5e6-96231b3b80d8
generated by cgit v1.2.3-70-g09d2 (git 2.46.0) at 2026-02-09 12:42:01 +0000