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AgeCommit message (Expand)Author
2013-03-21Add a WriteMicrocoded for ancient microcoded instructions.Jakob Stoklund Olesen
2013-03-20Model prefetches and barriers as loads.Jakob Stoklund Olesen
2013-03-20Add a catch-all WriteSystem SchedWrite type.Jakob Stoklund Olesen
2013-03-20Annotate the remaining SSE MOV instructions.Jakob Stoklund Olesen
2013-03-20Annotate SSE horizontal and integer instructions.Jakob Stoklund Olesen
2013-03-20Correct cost model for vector shift on AVX2Michael Liao
2013-03-20Add some missing SSE annotations.Jakob Stoklund Olesen
2013-03-20Annotate remaining IIC_BIN_* instructions.Jakob Stoklund Olesen
2013-03-20Fix PR15296Michael Liao
2013-03-20Mark all variable shifts needing customizingMichael Liao
2013-03-20Move scalar immediate shift lowering into a dedicated funcMichael Liao
2013-03-19Annotate various null idioms with SchedRW lists.Jakob Stoklund Olesen
2013-03-19Annotate SSE float conversions with SchedRW lists.Jakob Stoklund Olesen
2013-03-19Annotate X86InstrCMovSetCC.td with SchedRW lists.Jakob Stoklund Olesen
2013-03-19[ms-inline asm] Move the immediate asm rewrite into the target specificChad Rosier
2013-03-19Annotate X86InstrCompiler.td with SchedRW lists.Jakob Stoklund Olesen
2013-03-19[ms-inline asm] Create a helper function, CreateMemForInlineAsm, that createsChad Rosier
2013-03-19Remove an invalid and unnecessary Pat pattern from the X86 backend:Ulrich Weigand
2013-03-19Optimize sext <4 x i8> and <4 x i16> to <4 x i64>.Nadav Rotem
2013-03-19Annotate X86InstrExtension.td with SchedRW lists.Jakob Stoklund Olesen
2013-03-19Annotate a lot of X86InstrInfo.td with SchedRW lists.Jakob Stoklund Olesen
2013-03-19[ms-inline asm] Move the size directive asm rewrite into the target specificChad Rosier
2013-03-18[ms-inline asm] Avoid emitting a redundant sizing directive, if we've alreadyChad Rosier
2013-03-18Add SchedRW annotations to most of X86InstrSSE.td.Jakob Stoklund Olesen
2013-03-18Annotate X86 arithmetic instructions with SchedRW lists.Jakob Stoklund Olesen
2013-03-18TLS support for MinGW targets.Anton Korobeynikov
2013-03-18Post process ADC/SBB and use a shorter encoding if they use a sign extended i...Craig Topper
2013-03-18Refactor some duplicated code into helper functions.Craig Topper
2013-03-16Add X86 code emitter support AVX encoded MRMDestReg instructions.Craig Topper
2013-03-16Define more SchedWrites for annotating X86 instructions.Jakob Stoklund Olesen
2013-03-15Silence anonymous type in anonymous union warnings.Eric Christopher
2013-03-14Unaligned loads should use the VMOVUPS opcode.Nadav Rotem
2013-03-14Prepare for adding InstrSchedModel annotations to X86 instructions.Jakob Stoklund Olesen
2013-03-14[fast-isel] The X86FastISel::FastLowerArguments function doesn't properly handleChad Rosier
2013-03-14Fix the name of a variable to match its declaration. Fixes build failure from...Craig Topper
2013-03-14Fix a bug in the calculation of the VEX.B bit for FMA4 rr with the VEX.W bit ...Craig Topper
2013-03-14Teach X86 MC instruction lowering that VMOVAPSrr and other VEX-encoded regist...Craig Topper
2013-03-14Fix PR15309Michael Liao
2013-03-11Fixes disassembler crashes on 2013 Haswell RTM instructions.Kevin Enderby
2013-03-08DAGCombiner: Use correct value type for checking legality of BR_CC v3Tom Stellard
2013-03-07X86: Fold EXTRACT_SUBVECTORs of a BUILD_VECTOR into a smaller BUILD_VECTOR.Benjamin Kramer
2013-03-07Fix two remaining issue after fixing PR15355 when CMOV is not availableMichael Liao
2013-03-06Fix PR15355Michael Liao
2013-03-05The current X86 NOP padding uses one long NOP followed by the remainder inDavid Sehr
2013-03-04Bypass Slow DividesPreston Gurd
2013-03-02X86 cost model: Adjust cost for custom lowered vector multipliesArnold Schwaighofer
2013-03-01Fix PR10475Michael Liao
2013-03-01GCC thinks that this variable might be used uninitialized (it isn't).Duncan Sands
2013-02-28Re-format comments (and check commit access)Yiannis Tsiouris
2013-02-27Revert r176166 because it broke one of the lit tests.Nadav Rotem