| Age | Commit message (Expand) | Author |
|---|
| 2007-05-18 | Merge from mainline | Tanya Lattner |
| 2007-05-18 | Merge from mainline | Tanya Lattner |
| 2007-05-18 | Merging from mainline. | Tanya Lattner |
| 2007-05-06 | 3DNowA implies 3DNow. 64-bit implies SSE1, SSE2, and I assume MMX. | Bill Wendling |
| 2007-05-06 | Reference correct header | Nate Begeman |
| 2007-05-05 | move CodeGen/X86/overlap-add.ll here. | Chris Lattner |
| 2007-05-05 | Emit sections/directives in the proper order. This fixes PR1376. Also, | Anton Korobeynikov |
| 2007-05-04 | Add an "implies" field to features. This indicates that, if the current | Bill Wendling |
| 2007-05-03 | Fix two classes of bugs: | Chris Lattner |
| 2007-05-03 | Sets the section names for fixed-size constants and use the mergeable | Dan Gohman |
| 2007-05-03 | Drop 'const' | Devang Patel |
| 2007-05-02 | Non-algorithmic change. Moved definitions around into separate sections | Bill Wendling |
| 2007-05-02 | Update. | Bill Wendling |
| 2007-05-02 | Use 'static const char' instead of 'static const int'. | Devang Patel |
| 2007-05-02 | Emit correct register move information in eh frames for X86. This allows Shoo... | Anton Korobeynikov |
| 2007-05-02 | Emit correct DWARF reg # for RA (return address) register | Anton Korobeynikov |
| 2007-05-01 | Fix couple of bugs connected with eh info: | Anton Korobeynikov |
| 2007-05-01 | Do not use typeinfo to identify pass in pass manager. | Devang Patel |
| 2007-05-01 | Use correct PC symbol | Anton Korobeynikov |
| 2007-05-01 | Adjust correct EH-related sections | Anton Korobeynikov |
| 2007-05-01 | eliminateFrameIndex() change. | Evan Cheng |
| 2007-04-29 | Implement protected visibility. This partly implements PR1363. Linker | Anton Korobeynikov |
| 2007-04-26 | Fix PR1339 and CodeGen/X86/dollar-name.ll | Dan Gohman |
| 2007-04-26 | Have MMX registers clobbered in x86-64 too. | Bill Wendling |
| 2007-04-26 | Fix for PR1348. If stack inc / dec amount is > 32-bits, issue a series of add... | Evan Cheng |
| 2007-04-25 | Match MachineFunction::UsedPhysRegs changes. | Evan Cheng |
| 2007-04-25 | Add SSSE3 as a feature of Core2. Add MMX registers to the list of registers | Bill Wendling |
| 2007-04-25 | do the multiplication as signed, so that 2*-2 == -4 instead of 4294967292 | Chris Lattner |
| 2007-04-25 | Implement aliases. This fixes PR1017 and it's dependent bugs. CFE part | Anton Korobeynikov |
| 2007-04-25 | Relex assertions to account for additional implicit def / use operands. | Evan Cheng |
| 2007-04-25 | support for >4G stack frames | Chris Lattner |
| 2007-04-25 | support >4G stack frames | Chris Lattner |
| 2007-04-24 | Update. | Bill Wendling |
| 2007-04-24 | Add the PADDQ to the list. | Bill Wendling |
| 2007-04-24 | Add the final MMX instructions. Correct a few wrong patterns. | Bill Wendling |
| 2007-04-24 | Remove some invalid instructions from this check. | Bill Wendling |
| 2007-04-24 | Support for the special case of a vector with the canonical form: | Bill Wendling |
| 2007-04-23 | X86 TLS: optimize the implementation of "local exec" model. | Lauro Ramos Venancio |
| 2007-04-22 | X86 TLS: fix and optimize the implementation of "initial exec" model. | Lauro Ramos Venancio |
| 2007-04-21 | X86 TLS: Implement review feedback. | Lauro Ramos Venancio |
| 2007-04-20 | Comment out usage of write() for now. | Jeff Cohen |
| 2007-04-20 | Implement "general dynamic", "initial exec" and "local exec" TLS models for | Lauro Ramos Venancio |
| 2007-04-20 | Specify sub-register relations. e.g. RAX: [EAX], EAX: [AX], AX: [AL,AH]. | Evan Cheng |
| 2007-04-20 | Make Microsoft assembler and linker happy. | Jeff Cohen |
| 2007-04-18 | Fix the spelling of the prefetchnta instruction. | Dan Gohman |
| 2007-04-17 | Add comment | Anton Korobeynikov |
| 2007-04-17 | rename X86FunctionInfo to X86MachineFunctionInfo to match the header file | Chris Lattner |
| 2007-04-17 | Implemented correct stack probing on mingw/cygwin for dynamic alloca's. | Anton Korobeynikov |
| 2007-04-17 | SSE4 is apparently public now. | Chris Lattner |
| 2007-04-16 | In the event that some really old non-Intel or -AMD CPU is encountered... | Jeff Cohen |
